NTE955MC

更新时间： 2024-02-01 22:28:13

品牌	Logo	应用领域
NTE		模拟波形发生功能信号电路光电二极管
页数	文件大小	规格书
5页	46K
描述
Integrated Circuit CMOS Timing Circuit

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NTE955MC 技术参数

是否Rohs认证：	符合	生命周期：	Contact Manufacturer
零件包装代码：	SOIC	包装说明：	SOP, SOP8,.25
针数：	8	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.43	模拟集成电路 - 其他类型：	PULSE; RECTANGULAR
JESD-30 代码：	R-PDSO-G8	功能数量：	1
端子数量：	8	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
电源：	4.5/16 V	认证状态：	Not Qualified
子类别：	Analog Waveform Generation Functions	最大供电电压 (Vsup)：	16 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

NTE955MC 数据手册

NTE955MC

Integrated Circuit

CMOS Timing Circuit

Description:

The NTE955MC is a monolithic timing circuit in an 8–Lead DIP type package fabricated using CMOS

process. This timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies

up to 2MHz. Because of its high impedance, this device uses smaller timing capacitors than those

used by the NE555. As a result, more accurate time delays and oscillations are possible. Power con-

sumption is low across the full range of power supply voltage.

Like the NE555, the NTE955MC has a trigger level equal to approximately one–third of the supply

voltage and a threshold level equal to approximately two–thirds of the supply voltage. These levels

can be altered by use of the control voltage terminal (Pin5). When the trigger input (Pin2) falls below

the trigger level, the flip–flop is set and the output goes high. If Pin2 is above the trigger level and the

threshold input (Pin6) is above the threshold level, the flip–flop is reset and the output is low. The reset

input (Pin4) can override all other inputs and can be used to initiate a new timing cycle. If Pin4 is low,

the flip–flop is reset and the output is low. Whenever the output is low, a low–impedance path is pro-

vided between the discharge terminal (Pin7) and GND. All unused inputs should be tied to an ap-

propriate logic level to prevent false triggering.

While the CMOS output is capable of sinking over 100mA and sourcing over 10mA, the NTE955MC

exhibits greatly reduced supply–current spikes during output transitions. This minimizes the need for

the large decoupling capacitors required by the NE555.

Features:

D Direct Replacement for 555 Timers

D Very Low Power Consumption: 1mW Typ at V_DD= 5V

D Operates in Both Astable and Monostable Modes

D CMOS Output Capable of Swinging Rail to Rail

D High Output Current Capability:

Sink 100mA Typ

Source 10mA Typ

D Output Fully Compatible with CMOS, TTL, and MOS

D Low Supply Current Reduces Spikes During Output Transitions

D Single Supply Operation from 2V to 15V

Applications:

D Precision Timing

D Pulse Generation

D Sequential Timing

D Time Delay Generation

D Pulse Width Modulation

D Pulse Position Modulation

D Linear Ramp Generator

12 3 4 5

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