NTD4969N
Power MOSFET
30 V, 41 A, Single N−Channel, DPAK/IPAK
Features
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Three Package Variations for Design Flexibility
http://onsemi.com
V
R
MAX
I
D
MAX
(BR)DSS
DS(ON)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
9.0 mW @ 10 V
19 mW @ 4.5 V
Compliant
30 V
41 A
Applications
• CPU Power Delivery
• DC−DC Converters
D
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
30
Unit
G
V
DSS
V
V
A
V
GS
20
S
Continuous Drain
Current R
I
D
T = 25°C
12.7
A
N−CHANNEL MOSFET
q
JA
T = 100°C
A
9.0
(Note 1)
Power Dissipation
(Note 1)
4
T = 25°C
A
P
2.56
W
A
4
D
D
D
R
q
JA
4
Continuous Drain
Current R
I
D
T = 25°C
A
9.4
6.6
q
JA
T = 100°C
A
Steady
State
2
(Note 2)
Power Dissipation
(Note 2)
1
1
1
2
3
3
T = 25°C
A
P
I
1.38
W
A
2
3
R
q
JA
CASE 369AC
3 IPAK
(Straight Lead)
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
CASE 369D
IPAK
(Straight Lead
DPAK)
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
41
29
D
C
q
JC
T
C
(Note 1)
Power Dissipation
(Note 1)
T
C
P
26.3
W
A
R
q
JC
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Pulsed Drain
Current
t =10ms
p
T = 25°C
A
I
DM
150
40
4
Current Limited by Package
T = 25°C
A
I
A
DmaxPkg
Drain
4
4
Operating Junction and Storage
Temperature
T ,
−55 to
+175
°C
J
Drain
Drain
T
STG
Source Current (Body Diode)
Drain to Source dV/dt
I
24
6.0
18
A
S
dV/dt
EAS
V/ns
mJ
Single Pulse Drain−to−Source Avalanche
Energy (T = 25°C, V = 24 V, V = 10 V,
J
DD
GS
I = 19 A , L = 0.1 mH, R = 25 W)
2
L
pk
G
1
2
3
Drain
1
3
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
260
°C
L
Gate Drain Source
Gate Source
1
2
3
Gate Drain Source
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
Y
WW
= Year
= Work Week
4969N = Device Code
= Pb−Free Package
G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
April, 2011 − Rev. 1
NTD4969N/D