NTD4913N
Power MOSFET
30 V, 32 A, Single N−Channel, DPAK/IPAK
Features
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices
http://onsemi.com
V
R
DS(ON)
MAX
I
D
MAX
(BR)DSS
Applications
10.5 mW @ 10 V
15 mW @ 4.5 V
• CPU Power Delivery
• DC−DC Converters
30 V
32 A
D
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
Unit
V
DSS
30
20
V
V
A
G
V
GS
Continuous Drain
Current R
I
D
T = 25°C
10.5
A
q
JA
S
T = 100°C
A
7.4
2.5
(Note 1)
Power Dissipation
(Note 1)
N−CHANNEL MOSFET
T = 25°C
A
P
W
A
D
D
D
R
q
JA
4
4
Continuous Drain
Current R
I
D
T = 25°C
A
7.7
5.4
4
q
JA
T = 100°C
A
Steady
State
(Note 2)
Power Dissipation
(Note 2)
T = 25°C
A
P
I
1.36
W
A
2
1
1
1
R
q
JA
2
3
3
2
3
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
32
23
24
D
C
C
CASE 369AC
3 IPAK
(Straight Lead)
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
CASE 369D
IPAK
(Straight Lead
DPAK)
q
JC
T
C
(Note 1)
Power Dissipation
(Note 1)
T
P
W
A
R
q
JC
Pulsed Drain
Current
t =10ms
p
T = 25°C
A
I
DM
132
60
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Current Limited by Package
T = 25°C
A
I
A
DmaxPkg
4
Operating Junction and Storage
Temperature
T ,
STG
−55 to
°C
J
Drain
T
+175
4
4
Drain
Drain
Source Current (Body Diode)
Drain to Source dV/dt
I
S
20
8.0
22
A
dV/dt
EAS
V/ns
mJ
Single Pulse Drain−to−Source Avalanche
Energy (T = 25°C, V = 50 V, V = 10 V,
J
DD
GS
I = 21 A , L = 0.1 mH, R = 25 W)
L
pk
G
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
260
°C
L
2
1
2
3
Drain
1
3
Gate Drain Source
Gate Source
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
1
2
3
Gate Drain Source
Y
WW
= Year
= Work Week
4913N = Device Code
= Pb−Free Package
G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
©
Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
June, 2009 − Rev. 0
NTD4913N/D