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SCAN12100 PDF预览

SCAN12100

更新时间: 2024-02-16 21:45:18
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
14页 349K
描述
1228.8 and 614.4 Mbps CPRI SerDes with Auto RE Sync and Precision Delay Calibration Measurement

SCAN12100 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-100针数:100
Reach Compliance Code:not_compliantECCN代码:5A991.B.1
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.63Samacsys Description:SCAN12100TYA
其他特性:ALSO OPERATES IN 1.7 TO 1.9 VOLT差分输出:YES
驱动器位数:1输入特性:DIFFERENTIAL
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mm湿度敏感等级:3
功能数量:1端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTFQFP
封装等效代码:TQFP100,.63SQ封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8,3.3 V认证状态:Not Qualified
最大接收延迟:接收器位数:1
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmBase Number Matches:1

SCAN12100 数据手册

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November 2006  
SCAN12100  
1228.8 and 614.4 Mbps CPRI SerDes with Auto RE Sync and  
Precision Delay Calibration Measurement  
DCM also measures chip and other delays to ± 1200 ps  
General Description  
accuracy  
The SCAN12100 is a 1228.8 and 614.4 Mbps serializer/de-  
seralizer (SerDes) for high-speed bidirectional serial data  
transmission over FR-4 printed circuit board backplanes, bal-  
anced cables, and optical fiber. The SCAN12100 integrates  
precision delay calibration measurement (DCM) circuitry that  
measures link delay components to better than ± 800 ps ac-  
curacy.  
Deterministic chip latency  
Automatic receiver lock and RE synchronization without  
reference clock or external crystal  
Independent transmit and receive PLLs for seamless RE  
synchronization  
Low noise recovered clock output  
Requires no jitter cleaning in single-hop applications  
The SCAN12100 features independent transmit and receive  
PLLs, on-chip oscillator, and intelligent clock management  
circuitry to automatically perform remote radio head synchro-  
nization and reduce the cost and complexity of external clock  
networks.  
>8 kV ESD on the CML IO, >7 kV on all other pins, >2 kV  
CDM  
Hot plug protection  
LOS, LOF, 8b/10b line code violation, comma, and  
receiver PLL lock reporting  
Programmable hyperframe length and start of hyperframe  
character  
Programmable transmit de-emphasis and receive  
equalization with on-chip termination  
Advanced testability features  
The SCAN12100 is programmable though an MDIO interface  
as well as through pins, featuring configurable transmitter de-  
emphasis, receiver equalization, speed rate selection, inter-  
nal pattern generation/verification, and loop back modes. In  
addition to at-speed BIST, the SCAN12100 includes IEEE  
1149.1 and 1149.6 testability.  
Note: For a full SCAN12100 datasheet please contact  
your local National Semiconductor representitive  
IEEE 1149.1 and 1149.6  
At-speed BIST pattern generator/verifier  
Multiple loopback modes  
Features  
1.8V or 3.3V compatible parallel bus interface  
100-pin TQFP package with exposed dap  
Industrial –40 to +85° C temperature range  
Exceeds LV and HV CPRI voltage and jitter requirements  
1228.8, and 614.4 Mbps operation  
Pin and package compatibility with the SCAN25100  
Integrated delay calibration measurement (DCM) directly  
measures T14 and Toffset delays to ± 800 ps  
Block Diagram  
20209542  
© 2006 National Semiconductor Corporation  
202095  
www.national.com  

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