DP83850C

更新时间： 2024-02-29 22:40:11

品牌	Logo	应用领域
美国国家半导体 - NSC		控制器
页数	文件大小	规格书
37页	293K
描述
100 Mb/s TX/T4 Repeater Interface Controller (100RIC⑩)

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DP83850C 技术参数

生命周期：	Obsolete	包装说明：	BQFP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	JESD-30 代码：	S-PQFP-G132
长度：	24.13 mm	功能数量：	1
端子数量：	132	封装主体材料：	PLASTIC/EPOXY
封装代码：	BQFP	封装形状：	SQUARE
封装形式：	FLATPACK, BUMPER	认证状态：	Not Qualified
座面最大高度：	4.45 mm	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	端子形式：	GULL WING
端子节距：	0.64 mm	端子位置：	QUAD
宽度：	24.13 mm	Base Number Matches：	1

DP83850C 数据手册

June 1998

DP83850C 100 Mb/s TX/T4 Repeater Interface Controller

(100RIC^™)

General Description

Features

The DP83850C 100 Mb/s TX/T4 Repeater Interface Con- ■ IEEE 802.3u repeater and management compatible

troller, known as 100RIC, is designed speciﬁcally to meet

the needs of today's high speed Ethernet networking sys-

tems. The DP83850C is fully compatible with the IEEE

802.3 repeater's clause 27.

■ Supports Class II TX translational repeater and Class I

T4 repeater

■ Supports 12 network connections (ports)

■ Up to 31 repeater chips cascadable for larger hub appli-

The DP83850C supports up to twelve 100 Mb/s links with

its network interface ports. The 100RIC can be conﬁgured

to be used with either 100BASE-TX or 100BASE-T4 PHY

technologies. Larger repeaters with up to 372 ports may

be constructed by cascading DP83850Cs together using

the built-in Inter Repeater bus.

cations (up to 372 ports)

■ Separate jabber and partition state machines for each

port

■ Management interface to DP83856 allows all repeater

MIBs to be maintained

In conjunction with a DP83856 100 Mb/s Repeater Infor- ■ Large per-port management counters - reduces man-

mation Base device,

DP83850C based repeater

agement CPU overhead

becomes a managed entity that is compatible with IEEE

802.3u (clause 30), collecting and providing an easy inter-

face to all the required network statistics.

■ On-chip elasticity buffer for PHY signal re-timing to the

DP83850C clock source

■ Serial register interface - reduces cost

■ Physical layer device control/status access available via

the serial register interface

■ Detects repeater identification errors

■ 132 pin PQFP package

System Diagram

DP83850C

DP83856

100 Mb/s

Repeater Interface Controller

(100RIC8)

Repeater Information Base

(100RIB)

Inter Repeater Bus

Management Bus

(IR_COL, IR_DV)

Statistics

SRAM

RX Enable [11..0]

MII

Management

CPU

DP83840A

100 PHY

DP83840A

100 PHY

DP83840A

100 PHY

#11

DP83840A

100 PHY

Program

Memory

DP83223

100BASE-X

Transceiver

DP83223

100BASE-X

Transceiver

DP83223

100BASE-X

Transceiver

DP83223

100BASE-X

Transceiver

100Mb/s

Ethernet

Ports

Management

I/O Devices

Port 0

Port 1

Port 2

Port 11

Note: The above system diagram depicts the repeater conﬁgured in 100BASE-TX mode.

FAST^®is a registered trademark of Fairchild Semiconductor Corporation.

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

100RIC^™is a trademark of National Semiconductor Corporation.

www.national.com

12 3 4 5 6 7...37

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与DP83850C相关器件

型号	品牌	描述	获取价格	数据表
DP83850CVF	NSC	100 Mb/s TX/T4 Repeater Interface Controller	获取价格
DP83850VF	TI	IC,LAN HUB CONTROLLER,QFP,132PIN	获取价格
DP83850-X	TI	SPECIALTY TELECOM CIRCUIT, PQFP132, PLASTIC, QFP-132	获取价格
DP83856	TI	SPECIALTY TELECOM CIRCUIT, PQFP132, PLASTIC, QFP-132	获取价格
DP83856B	TI	DP83856B 100Mb/s Repeater Information Base	获取价格
DP83856VF	TI	IC,REPEATER MANAGEMENT,QFP,132PIN,PLASTIC	获取价格

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