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ADC10061 PDF预览

ADC10061

更新时间: 2024-01-02 06:12:32
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器复用器
页数 文件大小 规格书
14页 336K
描述
10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold

ADC10061 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.4Reach Compliance Code:unknown
风险等级:5.92最大模拟输入电压:5 V
转换器类型:D/A CONVERTERJESD-30 代码:R-XDIP-T24
JESD-609代码:e0最大线性误差 (EL):0.15%
模拟输入通道数量:1位数:10
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出位码:BINARY
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP24,.4封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

ADC10061 数据手册

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June 1999  
ADC10061/ADC10062/ADC10064  
10-Bit 600 ns A/D Converter with Input Multiplexer and  
Sample/Hold  
General Description  
Features  
n Built-in sample-and-hold  
*
Using an innovative, patented multistep conversion tech-  
nique, the 10-bit ADC10061, ADC10062, and ADC10064  
CMOS analog-to-digital converters offer sub-microsecond  
conversion times yet dissipate a maximum of only 235 mW.  
n Single +5V supply  
n 1, 2, or 4-input multiplexer options  
n No external clock required  
n Speed adjust pin for faster conversions (ADC10062  
and ADC10064). See ADC10662/4 for high speed  
guaranteed performance.  
The ADC10061, ADC10062, and ADC10064 perform  
a
10-bit conversion in two lower-resolution “flashes”, thus  
yielding a fast A/D without the cost, power dissipation, and  
other problems associated with true flash approaches. The  
ADC10061 is pin-compatible with the ADC1061 but much  
faster, thus providing a convenient upgrade path for the  
ADC1061.  
Key Specifications  
n Conversion time to 10 bits  
n
600 ns typical,  
900 ns max over temperature  
800 kHz  
The analog input voltage to the ADC10061, ADC10062, and  
ADC10064 is sampled and held by an internal sampling cir-  
cuit. Input signals at frequencies from dc to over 200 kHz  
can therefore be digitized accurately without the need for an  
external sample-and-hold circuit.  
n Sampling Rate  
n Low power dissipation  
n Total unadjusted error  
n No missing codes over temperature  
235 mW (max)  
1.0 LSB (max)  
±
The ADC10062 and ADC10064 include a “speed-up” pin.  
Connecting an external resistor between this pin and ground  
reduces the typical conversion time to as little as 350 ns with  
only a small increase in linearity error.  
Applications  
n Digital signal processor front ends  
n Instrumentation  
For ease of interface to microprocessors, the ADC10061,  
ADC10062, and ADC10064 have been designed to appear  
as a memory location or I/O port without the need for exter-  
nal interface logic.  
n Disk drives  
n Mobile telecommunications  
*
U.S. Patent Number 4918449  
Simplified Block Diagram  
DS011020-1  
*
ADC10061 Only  
**  
ADC10062 and ADC10064 Only  
***  
ADC10064 Only  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS011020  
www.national.com  

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