54F174DM

更新时间： 2024-02-14 17:23:30

品牌	Logo	应用领域
美国国家半导体 - NSC		触发器锁存器逻辑集成电路
页数	文件大小	规格书
8页	168K
描述
Hex D Flip-Flop with Master Reset

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技术参数
数据手册

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54F174DM 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.73
Is Samacsys：	N	Base Number Matches：	1

54F174DM 数据手册

November 1994

54F/74F174 Hex D Flip-Flop with Master Reset

General Description

Features

Edge-triggered D-type inputs

The ’F174 is a high-speed hex D flip-flop. The device is

used primarily as a 6-bit edge-triggered storage register.

The information on the D inputs is transferred to storage

during the LOW-to-HIGH clock transition. The device has a

Master Reset to simultaneously clear all flip-flops.

Buffered positive edge-triggered clock

Asynchronous common reset

Guaranteed 4000V minimum ESD protection

Package

Commercial

74F174PC

Military

Package Description

Number

N16E

J16A

16-Lead (0.300 Wide) Molded Dual-In-Line

54F174DM (Note 2)

16-Lead Ceramic Dual-In-Line

74F174SC (Note 1)

74F174SJ (Note 1)

M16A

M16D

W16A

E20A

16-Lead (0.150 Wide) Molded Small Outline, JEDEC

16-Lead (0.300 Wide) Molded Small Outline, EIAJ

54F174FM (Note 2)

54F174LM (Note 2)

16-Lead Cerpack

20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13 reel. Use Suffix

SCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

DMQB, FMQB and LMQB.

Logic Symbols

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

Pin Assignment

for LCC

TL/F/9489–3

TL/F/9489–1

TL/F/9489–2

IEEE/IEC

TL/F/9489–5

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/9489

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7 8

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54F174LM	FAIRCHILD	D Flip-Flop, F/FAST Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, CQCC	获取价格