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54ABT241W-QML PDF预览

54ABT241W-QML

更新时间: 2024-01-05 21:23:26
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动器
页数 文件大小 规格书
6页 123K
描述
Octal Buffer/Line Driver with TRI-STATE Outputs

54ABT241W-QML 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL20,.3Reach Compliance Code:unknown
风险等级:5.16Is Samacsys:N
其他特性:OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION控制类型:ENABLE LOW/HIGH
系列:ABTJESD-30 代码:R-GDFP-F20
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL20,.3封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):30 mA
Prop。Delay @ Nom-Sup:5.3 ns传播延迟(tpd):5.3 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:2.286 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.731 mm
Base Number Matches:1

54ABT241W-QML 数据手册

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July 1998  
54ABT241  
Octal Buffer/Line Driver with TRI-STATE® Outputs  
General Description  
The ABT241 is an octal buffer and line driver with 3-STATE  
outputs designed to be employed as a memory and address  
driver, clock driver, or bus-oriented transmitter/receiver.  
Features  
n Non-inverting buffers  
n Output sink capability of 48 mA, source capability of  
24 mA  
n Guaranteed latchup protection  
n High impedance glitch free bus loading during entire  
power up and power down cycle  
n Nondestructive hot insertion capability  
n Standard Microcircuit Drawing (SMD) 5962-9322701  
Ordering Code  
Military  
Package Number  
J20A  
Package Description  
54ABT241J-QML  
54ABT241W-QML  
54ABT241E-QML  
20-Lead Ceramic Dual-In-Line  
W20A  
20-Lead Cerpack  
E20A  
20-Lead Ceramic Leadless Chip Carrier, Type C  
Connection Diagram  
Pin Names  
Description  
OE1  
Output Enable Input (Active Low)  
Pin Assignment for  
DIP and Cerpack  
OE2  
Output Enable Input (Active High)  
I0–I7  
O0–O7  
Inputs  
Outputs  
Truth Table  
OE1  
H
I0–3  
X
O0–3  
OE2  
L
I4–7  
X
O4–7  
Z
H
L
Z
H
L
L
H
H
H
L
L
H
L
=
=
=
=
H
L
X
Z
HIGH Voltage Level  
LOW Voltage Level  
Immaterial  
High Impedance  
DS100215-1  
Pin Assignment for LCC  
DS100215-4  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
1
© 1998 National Semiconductor Corporation  
DS100215  
www.national.com  
PrintDate=1998/07/13 PrintTime=19:04:09 43584 ds100215 Rev. No. 1 cmserv Proof  
1

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