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54121

更新时间: 2024-02-19 19:10:32
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器
页数 文件大小 规格书
6页 131K
描述
One-Shot with Clear and Complementary Outputs

54121 技术参数

生命周期:Contact Manufacturer包装说明:DFP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.35其他特性:NON-RETRIGGERABLE; OPTIONAL INTERNAL TIMING RESISTOR
系列:TTL/H/LJESD-30 代码:R-GDFP-F14
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR数据/时钟输入次数:3
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK传播延迟(tpd):80 ns
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:FLAT端子位置:DUAL
Base Number Matches:1

54121 数据手册

 浏览型号54121的Datasheet PDF文件第2页浏览型号54121的Datasheet PDF文件第3页浏览型号54121的Datasheet PDF文件第4页浏览型号54121的Datasheet PDF文件第5页浏览型号54121的Datasheet PDF文件第6页 
June 1989  
54121/DM54121/DM74121 One-Shot with  
Clear and Complementary Outputs  
Y
Jitter free Schmitt-trigger input  
General Description  
Y
Y
Y
Y
Y
Y
Excellent noise immunity typically 1.2V  
Stable pulse width up to 90% duty cycle  
TTL, DTL compatible  
The DM54/74121 is a monostable multivibrator featuring  
both positive and negative edge triggering with complemen-  
tary outputs. An internal 2kX timing resistor is provided for  
design convenience minimizing component count and lay-  
out problems. This device can be used with a single external  
capacitor. Inputs (A) are active-low trigger transition inputs  
and input (B) is an active-high transition Schmitt-trigger in-  
put that allows jitter-free triggering from inputs with tran-  
sition rates as slow as 1 volt/second. A high immunity to  
Compensated for V  
Input clamp diodes  
and temperature variations  
CC  
Alternate Military/Aerospace device (54121) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
V
noise of typically 1.5V is also provided by internal cir-  
cuitry at the input stage.  
CC  
Functional Description  
The basic output pulse width is determined by selection of  
To obtain optimum and trouble free operation please read  
operating rules and NSC one-shot application notes careful-  
ly and observe recommendations.  
an internal resistor R or an external resistor (R ) and  
X
INT  
capacitor (C ). Once triggered the output pulse width is in-  
X
dependent of further transitions of the inputs and is a func-  
tion of the timing components. Pulse width can vary from a  
few nano-seconds to 28 seconds by choosing appropriate  
Features  
Y
R
and C combinations. There are three trigger inputs from  
X
Triggered from active-high transition or active-low tran-  
sition inputs  
X
the device, two negative edge-triggering (A) inputs, one pos-  
itive edge Schmitt-triggering (B) input.  
Y
Variable pulse width from 30 ns to 28 seconds  
Connection Diagram  
Function Table  
Inputs  
A2  
Outputs  
Dual-In-Line Package  
A1  
B
Q
Q
L
X
X
L
H
H
L
H
H
L
X
X
L
L
H
H
H
v
v
L
H
v
H
v
X
X
L
H
H
É
É
É
É
É
ß
ß
ß
ß
ß
H
H
u
u
X
L
e
e
e
e
e
e
e
H
High Logic Level  
L
Low Logic Level  
X
Can Be Either Low or High  
Positive Going Transition  
Negative Going Transition  
A Positive Pulse  
u
v
É
ß
TL/F/6538–1  
Order Number 54121DMQB, 54121FMQB,  
DM54121J, DM54121W or DM74121N  
A Negative Pulse  
See NS Package Number J14A, N14A or W14B  
C
1995 National Semiconductor Corporation  
TL/F/6538  
RRD-B30M105/Printed in U. S. A.  

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