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100329

更新时间: 2024-02-11 02:06:28
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
11页 245K
描述
Low Power Octal ECL/TTL Bidirectional Translator with Register

100329 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LCC包装说明:0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.6Is Samacsys:N
最大延迟:7.5 ns接口集成电路类型:TTL TO ECL TRANSCEIVER
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.43 mm湿度敏感等级:2
位数:8功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出锁存器或寄存器:REGISTER输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):235
电源:5,-4.5 V认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Level Translators
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.43 mm
Base Number Matches:1

100329 数据手册

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September 1999  
100329  
Low Power Octal ECL/TTL Bidirectional Translator with  
Register  
The 100329 is designed with FAST® TTL output buffers, fea-  
turing optimal DC drive and capable of quickly charging and  
discharging highly capacitive loads. All inputs have 50 k  
General Description  
The 100329 is an octal registered bidirectional translator de-  
signed to convert TTL logic levels to 100K ECL logic levels  
pull-down resistors.  
and vice versa. The direction of the translation is determined  
by the DIR input. A LOW on the output enable input (OE)  
Features  
n Bidirectional translation  
n ECL high impedance outputs  
n Registered outputs  
holds the ECL outputs in a cut-off state and the TTL outputs  
at a high impedance level. The outputs change synchro-  
nously with the rising edge of the clock input (CP) even  
though only one output is enabled at the time.  
n FAST TTL outputs  
n TRI-STATE® outputs  
n Voltage compensated operating range −4.2V to −5.7V  
n Standard Microcircuit Drawing  
The cut-off state is designed to be more negative than a nor-  
mal ECL LOW level. This allows the output emitter-followers  
to turn off when the termination supply is −2.0V, presenting a  
high impedance to the data bus. This high impedance re-  
duces the termination power and prevents loss of low state  
noise margin when several loads share the bus.  
=
(SMD) 5962-9206601  
Connection Diagrams  
24-Pin DIP  
24-Pin Quad Cerpack  
DS100306-4  
DS100306-2  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
FAST® is a registered trademark of Fairchild Semiconductor.  
© 1999 National Semiconductor Corporation  
DS100306  
www.national.com  

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