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100314F PDF预览

100314F

更新时间: 2024-01-11 19:59:03
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
8页 116K
描述
Low Power Quint Differential Line Receiver

100314F 数据手册

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August 1998  
100314  
Low Power Quint Differential Line Receiver  
General Description  
Features  
n 35% power reduction of the 100114  
n 2000V ESD protection  
The 100314 is a monolithic quint differential line receiver with  
emitter-follower outputs. An internal reference supply (VBB  
)
is available for single-ended reception. When used in  
single-ended operation the apparent input threshold of the  
true inputs is 25 mV to 30 mV higher (positive) than the  
threshold of the complementary inputs. Unlike other F100K  
ECL devices, the inputs do not have input pull-down resis-  
tors.  
n Pin/function compatible with 100114  
n Voltage compensated operating range −4.2V to −5.7V  
n Standard Microcircuit Drawing  
(SMD) 5962-9162901  
=
Active current sources provide common-mode rejection of  
1.0V in either the positive or negative direction. A defined  
output state exists if both inverting and non-inverting inputs  
are at the same potential between VEE and VCC. The defined  
state is logic HIGH on the Oa–Oe outputs.  
Logic Symbol  
Pin Names  
Da–De  
Description  
Data Inputs  
Da–De  
Oa–Oe  
Oa–Oe  
Inverting Data Inputs  
Data Outputs  
Complementary Data Outputs  
DS100299-1  
© 1998 National Semiconductor Corporation  
DS100299  
www.national.com  

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