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100302D PDF预览

100302D

更新时间: 2024-01-16 23:04:29
品牌 Logo 应用领域
美国国家半导体 - NSC
页数 文件大小 规格书
6页 110K
描述
Low Power Quint 2-Input OR/NOR Gate

100302D 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:QFF, QFL24,.4SQReach Compliance Code:unknown
风险等级:5.85Is Samacsys:N
JESD-30 代码:S-XQFP-F24JESD-609代码:e0
逻辑集成电路类型:OR/NOR GATE端子数量:24
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC封装代码:QFF
封装等效代码:QFL24,.4SQ封装形状:SQUARE
封装形式:FLATPACK电源:-4.5 V
最大电源电流(ICC):48 mAProp。Delay @ Nom-Sup:1.7 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:38535V;38534K;883S子类别:Gates
表面贴装:YES技术:ECL100K
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:QUADBase Number Matches:1

100302D 数据手册

 浏览型号100302D的Datasheet PDF文件第2页浏览型号100302D的Datasheet PDF文件第3页浏览型号100302D的Datasheet PDF文件第4页浏览型号100302D的Datasheet PDF文件第5页浏览型号100302D的Datasheet PDF文件第6页 
August 1998  
100302  
Low Power Quint 2-Input OR/NOR Gate  
n 2000V ESD protection  
n Pin/function compatible with 100102  
n Voltage compensated operating range −4.2V to −5.7V  
n Standard Microcircuit Drawing  
General Description  
The 100302 is a monolithic quint 2-input OR/NOR gate with  
common enable. All inputs have 50 kpull-down resistors  
and all outputs are buffered.  
=
(SMD) 5962-9152802  
Features  
n 43% power reduction of the 100102  
Logic Symbol  
Pin Names  
Description  
D
E
na–Dne  
Data Inputs  
Enable Input  
Oa–Oe  
Oa–Oe  
Data Outputs  
Complementary Data Outputs  
Truth Table  
D1X  
L
D2X  
E
L
OX  
L
OX  
H
L
L
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
L
L
H
L
L
DS100303-1  
H
H
H
H
L
L
H
L
L
H
H
L
H
L
=
=
H
L
HIGH Voltage Level  
LOW Voltage Level  
© 1998 National Semiconductor Corporation  
DS100303  
www.national.com  

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