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NSBA113EDXV6T5G PDF预览

NSBA113EDXV6T5G

更新时间： 2024-09-16 15:46:55
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管晶体管
页数 文件大小 规格书
11页 98K
描述
100mA, 50V, 2 CHANNEL, PNP, Si, SMALL SIGNAL TRANSISTOR, LEAD FREE, PLASTIC, CASE 463A-01, 6 PIN

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NSBA113EDXV6T5G 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：SMALL OUTLINE, R-PDSO-F6针数：6
Reach Compliance Code：compliantECCN代码：EAR99
风险等级：5.8其他特性：BUILT IN BIAS RESISTOR RATIO IS 1
最大集电极电流 (IC)：0.1 A集电极-发射极最大电压：50 V
配置：SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR最小直流电流增益 (hFE)：3
JESD-30 代码：R-PDSO-F6JESD-609代码：e3
湿度敏感等级：1元件数量：2
端子数量：6封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：PNP
最大功率耗散 (Abs)：0.5 W认证状态：Not Qualified
子类别：BIP General Purpose Small Signal表面贴装：YES
端子面层：Tin (Sn)端子形式：FLAT
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管元件材料：SILICONBase Number Matches：1

NSBA113EDXV6T5G 数据手册

 浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第2页浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第3页浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第4页浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第5页浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第6页浏览型号NSBA113EDXV6T5G的Datasheet PDF文件第7页 
NSBA114EDXV6T1,  
NSBA114EDXV6T5 SERIES  
Preferred Devices  
Dual Bias Resistor  
Transistors  
PNP Silicon Surface Mount Transistors  
with Monolithic Bias Resistor Network  
http://onsemi.com  
(3)  
(2)  
(1)  
The BRT (Bias Resistor Transistor) contains a single transistor with  
a monolithic bias network consisting of two resistors; a series base  
resistor and a base−emitter resistor. These digital transistors are  
designed to replace a single device and its external resistor bias  
network. The BRT eliminates these individual components by  
integrating them into a single device. In the NSBA114EDXV6T1  
series, two BRT devices are housed in the SOT−563 package which is  
ideal for low−power surface mount applications where board space is  
at a premium.  
R
1
R
2
Q
1
Q
2
R
2
R
1
(4)  
(5)  
(6)  
SOT−563  
Features  
CASE 463A  
PLASTIC  
STYLE 1  
• Simplifies Circuit Design  
• Reduces Board Space  
• Reduces Component Count  
• These are Pb−Free Devices  
1
MARKING DIAGRAM  
MAXIMUM RATINGS  
(T = 25°C unless otherwise noted, common for Q and Q )  
A
xx M G  
1
2
G
Rating  
Symbol  
Value  
−50  
Unit  
Collector-Base Voltage  
V
V
Vdc  
CBO  
CEO  
Collector-Emitter Voltage  
Collector Current  
−50  
Vdc  
xx = Device Code  
(Refer to page 2)  
I
−100  
mAdc  
C
M
= Date Code  
THERMAL CHARACTERISTICS  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
Characteristic  
(One Junction Heated)  
Symbol  
Max  
Unit  
ORDERING INFORMATION  
Total Device Dissipation @ T = 25°C  
P
357  
2.9  
mW  
mW/°C  
A
D
†
Derate above 25°C (Note 1)  
Shipping  
Device  
Package  
Thermal Resistance, Junction-to-Ambient  
(Note 1)  
R
350  
°C/W  
q
JA  
NSBA1xxxDXV6T1 SOT−563* 4000/Tape & Reel  
NSBA1xxxDXV6T1G SOT−563* 4000/Tape & Reel  
Characteristic  
(Both Junctions Heated)  
NSBA1xxxDXV6T5 SOT−563* 8000/Tape & Reel  
NSBA1xxxDXV6T5G SOT−563* 8000/Tape & Reel  
Symbol  
Max  
Unit  
Total Device Dissipation @ T = 25°C  
P
500  
4.0  
mW  
mW/°C  
A
D
Derate above 25°C (Note 1)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Thermal Resistance, Junction-to-Ambient  
(Note 1)  
R
q
250  
°C/W  
JA  
Junction and Storage Temperature  
Range  
T , T  
J
−55 to  
+150  
°C  
stg  
**This package is inherently Pb−Free.  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. FR−4 @ Minimum Pad  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking table  
on page 2 of this data sheet.  
Preferred devices are recommended choices for future use  
and best overall value.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 6  
NSBA114EDXV6/D  
 
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 		Dual PNP Bias Resistor Transistors
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