NMUX1309-Q100
1.5 V to 5.5 V, dual 4-channel switch analog multiplexer and
demultiplexer with injection-current control
Rev. 1.1 — 21 February 2024
Product data sheet
1. General description
The NMUX1309-Q100 is a general purpose, CMOS, bi-directional, dual 4 channel analog switch,
with an operating voltage range of 1.5 V to 5.5 V. The NMUX1309-Q100 is dual source compatible
with existing 4852 and 4052 devices. The NUMX1309-Q100 extends the digital logic thresholds to
be compatible with 1.8 V systems without the need for voltage translation.
The analog signal pins are comprised of two common inputs/outputs (nZ) and eight independent
inputs/outputs (nY0 to nY3). All analog signal pins are bi-directional and support a voltage range
from GND to VCC
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All analog signal pins integrate injection current control circuitry. This control circuitry isolates
overvoltage spikes on disconnected analog signal pins from coupling to the connected analog
signal path, thereby preserving measurement accuracy. Additionally, this integration makes the use
of external overvoltage clamp components (e.g. resistive diode network) unnecessary.
There are three control signal pins (S0, S1, and E). S0 and S1 determine the analog channels
to connect between nZ and nYn. E can be used to override S0 and S1, disconnecting all analog
channels. The control signal pins support 1.8 V logic thresholds across all operating voltages.
In addition, these pins are 5.5 V tolerant, enabling up to 5.5 V operation independent of supply
voltage.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
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Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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Wide operating range: 1.5 V to 5.5 V
2x SP4T-Z functionality
Rail-to-Rail operation on analog signal pins
Injection current control
1.8 V digital logic thresholds
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Digital pins compatible with 1.8 V logic thresholds across full VCC range
Removes need for up-translation device for compatibility with low voltage GPIOs
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Ioff circuitry
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Enables wider latitude for power sequencing considerations
Isolates backflow between supply rail and any biased digital/analog input when VCC = 0 V
Prevents any biased digital/analog input from backpowering VCC when VCC = 0 V
Maintains Hi-Z state of analog switch when VCC = 0 V
5.5 V overvoltage tolerant digital inputs
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Supports switching of 5.5 V digital signals across full VCC operating range
Removes need for down-translation when switching thresholds are met
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Pin compatible with industry standard 4052 and 4852 analog switch products
ESD protection:
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HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C2b exceeds 750 V
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DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints