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NM34C02LMT8 PDF预览

NM34C02LMT8

更新时间: 2024-01-18 01:08:46
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
12页 94K
描述
2K-Bit Standard 2-Wire Bus Interface

NM34C02LMT8 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:SOIC
包装说明:PLASTIC, TSSOP-8针数:8
Reach Compliance Code:unknown风险等级:5.86
Is Samacsys:N其他特性:16 BYTE PAGE WRITE; DATA RETENTION > 40 YEARS
最大时钟频率 (fCLK):0.1 MHzJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.4 mm
内存密度:2048 bit内存集成电路类型:EEPROM
内存宽度:8湿度敏感等级:NOT SPECIFIED
功能数量:1端子数量:8
字数:256 words字数代码:256
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256X8
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:COMMERCIAL座面最大高度:1.2 mm
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mm最长写入周期时间 (tWC):15 ms
Base Number Matches:1

NM34C02LMT8 数据手册

 浏览型号NM34C02LMT8的Datasheet PDF文件第2页浏览型号NM34C02LMT8的Datasheet PDF文件第3页浏览型号NM34C02LMT8的Datasheet PDF文件第4页浏览型号NM34C02LMT8的Datasheet PDF文件第5页浏览型号NM34C02LMT8的Datasheet PDF文件第6页浏览型号NM34C02LMT8的Datasheet PDF文件第7页 
March 1999  
NM34C02  
2K-Bit Standard 2-Wire Bus Interface  
Designed with Permanent Write-Protection for First 128 Bytes for Serial Presence  
Detect Application on Memory Modules  
General Description  
Features  
The NM34C02 is 2048 bits of CMOS non-volatile electrically  
erasable memory. It is designed to support Serial Presence  
Detect circuitry in memory modules. This communications proto-  
col uses CLOCK (SCL) and DATA I/O (SDA) lines to synchro-  
nously clock data between the master (for example a micropro-  
cessor) and the slave EEPROM device(s).  
Extended Operating Voltage: 2.7V-5.5V  
Write-Protection for first 128 bytes  
200 µA active current typical  
– 10 µA standby current typical  
– 1.0 µA standby current typical (L)  
– 0.1 µA standby current typical (LZ)  
The contents of the non-volatile memory allows the CPU to  
determine the capacity of the module and the electrical character-  
istics of the memory devices it contains. This will enable "plug and  
play" capability as the module is read and PC main memory  
resources utilized through the memory controller.  
IIC compatible interface  
– Provides bidirectional data transfer protocol  
Sixteen byte page write mode  
– Minimizes total write time per byte  
The first 128 bytes of the memory of the NM34C02 can be  
permanentlyWriteProtectedbywritingtothe"WRITEPROTECT"  
Register. Write Protect implementation details are described  
under the section titled Addressing the WP Register.  
Self timed write cycle  
- Typical write cycle time of 6ms  
Endurance: 1,000,000 data changes  
Data retention greater than 40 years  
The NM34C02 is available in a JEDEC standard TSSOP package  
for low profile memory modules for systems requiring efficient  
space utilization such as in a notebook computer. Two options are  
available: L - Low Voltage and LZ - Low Power, allowing the part  
to be used in systems where battery life is of primary importance.  
Packages available: 8-pin TSSOP and 8-pin SO  
Block Diagram  
V
CC  
V
SS  
H.V. GENERATION  
TIMING &CONTROL  
START CYCLE  
START  
STOP  
SDA  
LOGIC  
CONTROL  
LOGIC  
SLAVE ADDRESS  
REGISTER &  
COMPARATOR  
2
E
PROM  
16  
ARRAY  
16 x 16 x 8  
XDEC  
SCL  
LOAD  
INC  
A2  
A1  
A0  
WORD  
ADDRESS  
COUNTER  
0/1/2/3  
4
16  
4
R/W  
YDEC  
Device Address Bits  
8
Write Protect  
Register  
CK  
D
OUT  
DATA REGISTER  
D
IN  
DS012821-1  
1
© 1999 Fairchild Semiconductor Corporation  
NM34C02 Rev. D.2  
www.fairchildsemi.com  

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