MC74HCT541A
Octal 3−State Non−Inverting
Buffer/Line Driver/
Line Receiver With
LSTTL−Compatible Inputs
http://onsemi.com
MARKING DIAGRAMS
High−Performance Silicon−Gate CMOS
The MC74HCT541A is identical in pinout to the LS541. This
device may be used as a level converter for interfacing TTL or NMOS
outputs to high speed CMOS inputs.
The HCT541A is an octal non−inverting buffer/line driver/line
receiver designed to be used with 3−state memory address drivers,
clock drivers, and other bus−oriented systems. This device features
inputs and outputs on opposite sides of the package and two ANDed
active−low output enables.
PDIP−20
N SUFFIX
CASE 738
20
1
MC74HCT541AN
AWLYYWWG
1
Features
20
• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1mA
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 134 FETs or 33.5 Equivalent Gates
• Pb−Free Packages are Available*
SOIC−20WB
DW SUFFIX
CASE 751D
HCT541A
AWLYYWWG
1
1
20
1
TSSOP−20
DT SUFFIX
CASE 948E
HCT
541A
ALYWG
G
LOGIC DIAGRAM
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
A8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
1
20
1
SOEIAJ−20
F SUFFIX
CASE 967
74HCT541A
AWLYWWG
Data
Inputs
Non−Inverting
Outputs
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
1
Output OE1
OE2
PIN 20 = V
CC
PIN 10 = GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Enables
19
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 5
MC74HCT541A/D