Datasheet > 逻辑 > 总线驱动器/收发器> NLVHCT373ADWR2G

NLVHCT373ADWR2G

更新时间： 2024-11-21 11:01:47

品牌	Logo	应用领域
安森美 - ONSEMI		驱动总线驱动器总线收发器
页数	文件大小	规格书
9页	153K
描述
八路锁存

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NLVHCT373ADWR2G 数据手册

MC74HCT373A

Octal 3-State Noninverting

Transparent Latch with

LSTTL-Compatible Inputs

High−Performance Silicon−Gate CMOS

http://onsemi.com

MARKING

The MC74HCT373A may be used as a level converter for

interfacing TTL or NMOS outputs to High−Speed CMOS inputs.

The HCT373A is identical in pinout to the LS373.

DIAGRAMS

The eight latches of the HCT373A are transparent D−type latches.

While the Latch Enable is high the Q outputs follow the Data Inputs.

When Latch Enable is taken low, data meeting the setup and hold

times becomes latched.

The Output Enable does not affect the state of the latch, but when

Output Enable is high, all outputs are forced to the high−impedance

state. Thus, data may be latched even when the outputs are not

enabled.

The HCT373A is identical in function to the HCT573A, which has

the input pins on the opposite side of the package from the output pins.

This device is similar in function to the HCT533A, which has

inverting outputs.

PDIP−20

N SUFFIX

CASE 738

MC74HCT373AN

AWLYYWWG

SOIC−20

DW SUFFIX

CASE 751D

HCT373A

AWLYYWWG

• Output Drive Capability: 15 LSTTL Loads

HCT

373A

ALYWG

TSSOP−20

DT SUFFIX

CASE 948E

• TTL/NMOS−Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 mA

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7 A

• Chip Complexity: 196 FETs or 49 Equivalent Gates

• These Devices are Pb−Free and are RoHS Compliant

SOEIAJ−20

F SUFFIX

CASE 967

74HCT373A

AWLYWWG

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

WW, W = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

†

Device

Package

PDIP−20

SOIC−20

Shipping

18 / Box

38 / Rail

MC74HCT373ANG

MC74HCT373ADWG

MC74HCT373ADWR2G

MC74HCT373AFELG

SOIC−20 1000 / Reel

SOEIAJ−20 2000 / Reel

MC74HCT373ADTR2G TSSOP−20 2500 / Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

Publication Order Number:

June, 2011 − Rev. 12

MC74HCT373A/D

12 3 4 5 6 7...9

中文翻译

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与NLVHCT373ADWR2G相关器件

型号	品牌	获取价格	描述	数据表
NLVHCT374ADTR2G	ONSEMI	获取价格	Octal 3-State Non-inverting D Flip-Flop
NLVHCT4851ADTR2G	ONSEMI	获取价格	Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compa
NLVHCT4852ADTR2G	ONSEMI	获取价格	Analog Multiplexers/ Demultiplexers
NLVHCT541ADTR2G	ONSEMI	获取价格	Octal 3-State Non-inverting Buffer/Line Driver/Line Receiver, TTL Level
NLVHCT541ADWR2G	ONSEMI	获取价格	Octal 3-State Non-inverting Buffer/Line Driver/Line Receiver, TTL Level
NLVHCT574ADWR2G	ONSEMI	获取价格	Octal 3-State Non-inverting D Flip-Flop
NLVLCX08DTR2G	ONSEMI	获取价格	低电压四路 2 输入 AND 门极
NLVLCX125DTR2G	ONSEMI	获取价格	Low-Voltage CMOS Quad Buffer
NLVLVX32DTR2G	ONSEMI	获取价格	Quad 2-Input OR Gate
NLVLVX4052DTR2G	ONSEMI	获取价格	模拟多工器/信号分离器 (Mux/Demux)

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