NLV74VHCT541ADTRG

更新时间： 2024-11-29 11:01:43

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	104K
描述
Non-inverting Octal Bus Buffer/Line Driver/Line Receiver, TTL Level, 3-State

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MC74VHCT541A

Octal Bus Buffer

The MC74VHCT541A is an advanced high speed CMOS octal bus

buffer fabricated with silicon gate CMOS technology. It achieves high

speed operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

The MC74VHCT541A is a noninverting, 3−state, buffer/line

driver/line receiver. When either OE1 or OE2 is high, the terminal

outputs are in the high impedance state.

http://onsemi.com

The VHCT inputs are compatible with TTL levels. This device can

be used as a level converter for interfacing 3.3 V to 5.0 V, because it

has full 5.0 V CMOS level output swings.

MARKING

DIAGRAMS

The VHCT541A input and output (when disabled) structures

provide protection when voltages between 0 V and 5.5 V are applied,

regardless of the supply voltage. These input and output structures

help prevent device destruction caused by supply

voltage−input/output voltage mismatch, battery backup, hot insertion,

etc.

VHCT541A

AWLYYWWG

SOIC−20WB

SUFFIX DW

CASE 751D

Features

• High Speed: t = 5.4 ns (Typ) at V = 5.0 V

VHCT

541A

ALYWG

• Low Power Dissipation: I = 4 mA (Max) at T = 25°C

• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V

TSSOP−20

SUFFIX DT

CASE 948E

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Designed for 4.5 V to 5.5 V Operating Range

• Low Noise: V

= 1.6 V (Max)

OLP

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

74VHCT541

AWLYWWG

SOEIAJ−20

SUFFIX M

CASE 967

• ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

• Chip Complexity: 134 FETs or 33.5 Equivalent Gates

• Pb−Free Packages are Available*

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

WW, W = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

FUNCTION TABLE

Inputs

Output Y

OE1 OE2

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

January, 2006 − Rev. 4

MC74VHCT541A/D

12 3 4 5 6

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