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NLV74VHCT14ADTR2G PDF预览

NLV74VHCT14ADTR2G

更新时间: 2024-11-29 01:18:39
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安森美 - ONSEMI /
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6页 93K
描述
Hex Schmitt Inverter

NLV74VHCT14ADTR2G 数据手册

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MC74VHCT14A  
Hex Schmitt Inverter  
The MC74VHCT14A is an advanced high speed CMOS Schmitt  
inverter fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
Pin configuration and function are the same as the  
MC74VHCT04A, but the inputs have hysteresis and, with its Schmitt  
trigger function, the VHCT14A can be used as a line receiver which  
will receive slow input signals.  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V, because it  
has full 5.0 V CMOS level output swings.  
www.onsemi.com  
MARKING  
DIAGRAMS  
14  
SOIC−14  
D SUFFIX  
CASE 751A  
VHCT14AG  
AWLYWW  
The VHCT14A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage.  
1
The output structures also provide protection when V = 0 V. These  
1
CC  
input and output structures help prevent device destruction caused by  
supply voltage − input/output voltage mismatch, battery backup, hot  
insertion, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
14  
VHCT  
14A  
TSSOP−14  
DT SUFFIX  
CASE 948G  
ALYWG  
G
1
1
A
= Assembly Location  
Features  
WL, L = Wafer Lot  
Y, YY = Year  
High Speed: t = 5.5 ns (Typ) at V = 5.0 V  
PD  
CC  
WW, W = Work Week  
G or G = Pb−Free Package  
Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C  
CC  
A
(Note: Microdot may be in either location)  
TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
FUNCTION TABLE  
Designed for 2.0 V to 5.5 V Operating Range  
Inputs  
A
Outputs  
Y
Low Noise: V  
= 0.8 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: 60 FETs or 15 Equivalent Gates  
L
H
L
H
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
These Devices are Pb−Free and are RoHS Compliant  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
August, 2017 − Rev. 8  
MC74VHCT14A/D  

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