Datasheet > NLV74VHC32DTR2G

NLV74VHC32DTR2G

更新时间： 2024-11-26 11:01:47

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
6页	84K
描述
2-1 Quad OR Gate

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NLV74VHC32DTR2G 数据手册

MC74VHC32

Quad 2-Input OR Gate

The MC74VHC32 is an advanced high speed CMOS 2−input OR

gate fabricated with silicon gate CMOS technology. It achieves high

speed operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output. The

inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V

systems to 3.0 V systems.

http://onsemi.com

MARKING

DIAGRAMS

Features

• High Speed: t = 3.8 ns (Typ) at V = 5.0 V

VHC32G

AWLYWW

• Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C

SOIC−14

D SUFFIX

CASE 751A

• High Noise Immunity: V

= V

= 28% V

NIL CC

NIH

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Designed for 2.0 V to 5.5 V Operating Range

• Low Noise: V

= 0.8 V (Max)

OLP

VHC

ALYW ꢀ

ꢀ

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

TSSOP

• ESD Performance:

DT SUFFIX

CASE 948G

Human Body Model > 2000 V;

Machine Model > 200 V

• Chip Complexity: 48 FETs or 12 Equivalent Gates

• These Devices are Pb−Free and are RoHS Compliant

= Assembly Location

= Year

WL, L = Wafer Lot

WW, W = Work Week

G or ꢀ = Pb−Free Package

(Note: Microdot may be in either location)

FUNCTION TABLE

Y = A+B

Inputs

Output

Figure 1. Logic Diagram

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Y2 GND

(Top View)

Figure 2. Pinout: 14−Lead Packages

Publication Order Number:

September, 2014 − Rev. 7

MC74VHC32/D

12 3 4 5 6

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