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NLV74VHC14DTR2G

更新时间： 2024-11-26 11:01:47
品牌 Logo 应用领域
安森美 - ONSEMI 栅触发器栅极
页数 文件大小 规格书
7页 83K
描述
带施密特触发器输入的六路逆变器

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NLV74VHC14DTR2G 数据手册

 浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第2页浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第3页浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第4页浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第5页浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第6页浏览型号NLV74VHC14DTR2G的Datasheet PDF文件第7页 
MC74VHC14  
Hex Schmitt Inverter  
The MC74VHC14 is an advanced high speed CMOS Schmitt  
inverter fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHC04 but  
the inputs have hysteresis and, with its Schmitt trigger function, the  
VHC14 can be used as a line receiver which will receive slow input  
signals.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
14  
1
SOIC−14  
D SUFFIX  
CASE 751A  
VHC14G  
AWLYWW  
Features  
• High Speed: t = 5.5 ns (Typ) at V = 5.0 V  
PD  
CC  
• Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C  
CC  
A
• High Noise Immunity: V  
= V = 28% V  
NIL CC  
NIH  
14  
• Power Down Protection Provided on Inputs  
• Balanced Propagation Delays  
VHC  
14  
TSSOP  
DT SUFFIX  
CASE 948G  
ALYW  
ꢀ
ꢀ
• Designed for 2.0 V to 5.5 V Operating Range  
1
• Low Noise: V  
= 0.8 V (Max)  
OLP  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300 mA  
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
• ESD Performance: Human Body Model > 2000 V;  
Y
WW, W = Work Week  
G or ꢀ = Pb−Free Package  
Machine Model > 200 V  
• Chip Complexity: 60 FETs or 15 Equivalent Gates  
• Pb−Free Packages are Available  
(Note: Microdot may be in either location)  
FUNCTION TABLE  
V
A6  
Y6  
A5  
Y5  
A4  
Y4  
CC  
Inputs  
Outputs  
14  
13  
12  
11  
10  
9
8
A
Y
L
H
L
H
1
2
3
4
5
6
7
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
A1  
Y1  
A2  
Y2  
A3  
Y3 GND  
Figure 1. 14−Lead Pinout (Top View)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 − Rev. 9  
MC74VHC14/D  
1234567

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