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NLV74HCT573ADWRG PDF预览

NLV74HCT573ADWRG

更新时间: 2024-11-26 11:01:47
品牌 Logo 应用领域
安森美 - ONSEMI 驱动总线驱动器总线收发器
页数 文件大小 规格书
8页 153K
描述
八路 3 态透明锁存/收发器

NLV74HCT573ADWRG 数据手册

 浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第2页浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第3页浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第4页浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第5页浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第6页浏览型号NLV74HCT573ADWRG的Datasheet PDF文件第7页 
MC74HCT573A  
Octal 3-State Noninverting  
Transparent Latch with  
LSTTL Compatible Inputs  
HighPerformance SiliconGate CMOS  
http://onsemi.com  
MARKING  
The MC74HCT573A is identical in pinout to the LS573. This  
device may be used as a level converter for interfacing TTL or NMOS  
outputs to HighSpeed CMOS inputs.  
These latches appear transparent to data (i.e., the outputs change  
asynchronously) when Latch Enable is high. When Latch Enable goes  
low, data meeting the setup and hold times becomes latched.  
The Output Enable input does not affect the state of the latches, but  
when Output Enable is high, all device outputs are forced to the  
highimpedance state. Thus, data may be latched even when the  
outputs are not enabled.  
DIAGRAMS  
20  
20  
PDIP20  
N SUFFIX  
CASE 738  
MC74HCT573AN  
AWLYYWWG  
1
1
20  
The HCT573A is identical in function to the HCT373A but has the  
Data Inputs on the opposite side of the package from the outputs to  
facilitate PC board layout.  
SOIC20  
DW SUFFIX  
CASE 751D  
20  
HCT573A  
AWLYYWWG  
1
Output Drive Capability: 15 LSTTL Loads  
TTL/NMOSCompatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 10 mA  
1
20  
HCT  
573A  
ALYWG  
G
TSSOP20  
DT SUFFIX  
CASE 948E  
20  
In Compliance with the Requirements Defined by JEDEC Standard  
1
No. 7 A  
1
Chip Complexity: 234 FETs or 58.5 Equivalent Gates  
— Improved Propagation Delays  
— 50% Lower Quiescent Power  
These Devices are PbFree and are RoHS Compliant  
20  
SOEIAJ20  
F SUFFIX  
CASE 967  
20  
74HCT573A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
Device  
MC74HCT573ANG  
Package  
Shipping  
PDIP20  
18 / Rail  
MC74HCT573ADWR2G SOIC20 1000 / Reel  
MC74HCT573ADTR2G TSSOP20 2500 / Reel  
MC74HCT573AFELG  
SOEIAJ20 2000 / Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
June, 2011 Rev. 12  
MC74HCT573A/D  

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