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NLV14024BDG PDF预览

NLV14024BDG

更新时间: 2024-11-28 01:23:27
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 104K
描述
7-Stage Ripple Counter

NLV14024BDG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.67计数方向:UP
系列:4000/14000/40000JESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
负载电容(CL):50 pF负载/预设输入:NO
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:1000000 Hz
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:7功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 V传播延迟(tpd):2000 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:Counters
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:3.9 mmBase Number Matches:1

NLV14024BDG 数据手册

 浏览型号NLV14024BDG的Datasheet PDF文件第2页浏览型号NLV14024BDG的Datasheet PDF文件第3页浏览型号NLV14024BDG的Datasheet PDF文件第4页浏览型号NLV14024BDG的Datasheet PDF文件第5页浏览型号NLV14024BDG的Datasheet PDF文件第6页浏览型号NLV14024BDG的Datasheet PDF文件第7页 
MC14024B  
7-Stage Ripple Counter  
The MC14024B is a 7−stage ripple counter with short propagation  
delays and high maximum clock rates. The Reset input has standard  
noise immunity, however the Clock input has increased noise  
immunity due to Hysteresis. The output of each counter stage is  
buffered.  
http://onsemi.com  
Features  
Diode Protection on All Inputs  
Output Transitions Occur on the Falling Edge of the Clock Pulse  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low−power TTL Loads or One Low−power  
Schottky TTL Load Over the Rated Temperature Range  
Pin−for−Pin Replacement for CD4024B  
SOIC−14  
D SUFFIX  
CASE 751A  
PIN ASSIGNMENT  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
CLOCK  
RESET  
Q7  
1
2
3
4
5
6
7
14  
V
DD  
13 NC  
12 Q1  
11 Q2  
10 NC  
This Device is Pb−Free and is RoHS Compliant  
Q6  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Q5  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
Q4  
9
8
Q3  
NC  
V
DD  
DC Supply Voltage Range  
V
SS  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
in out  
DD  
V
V
= PIN 14  
= PIN 7  
DD  
SS  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
10  
mA  
NC = NO CONNECTION  
MARKING DIAGRAM  
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
14  
A
T
stg  
14024BG  
AWLYWW  
T
Lead Temperature  
L
(8−Second Soldering)  
1
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G
= Pb−Free Package  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V (V or V ) V .  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
August, 2014 − Rev. 10  
MC14024B/D  
 

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