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NLAST4051QS PDF预览

NLAST4051QS

更新时间: 2024-11-19 22:05:51
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器
页数 文件大小 规格书
16页 129K
描述
Analog Multiplexer/ Demultiplexer

NLAST4051QS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SSOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.57
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:4.9 mm
湿度敏感等级:1负电源电压最大值(Vsup):-5.5 V
负电源电压最小值(Vsup):标称负供电电压 (Vsup):-3 V
信道数量:8功能数量:1
端子数量:16标称断态隔离度:93 dB
通态电阻匹配规范:15 Ω最大通态电阻 (Ron):37 Ω
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):235
电源:-3.3/GND,3.3/5 V认证状态:Not Qualified
座面最大高度:1.75 mm最大信号电流:0.05 A
子类别:Multiplexer or Switches最大供电电流 (Isup):0.08 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3 V表面贴装:YES
最长断开时间:28 ns最长接通时间:28 ns
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9116 mm
Base Number Matches:1

NLAST4051QS 数据手册

 浏览型号NLAST4051QS的Datasheet PDF文件第2页浏览型号NLAST4051QS的Datasheet PDF文件第3页浏览型号NLAST4051QS的Datasheet PDF文件第4页浏览型号NLAST4051QS的Datasheet PDF文件第5页浏览型号NLAST4051QS的Datasheet PDF文件第6页浏览型号NLAST4051QS的Datasheet PDF文件第7页 
NLAST4051  
Analog Multiplexer/  
Demultiplexer  
TTL Compatible, Single–Pole, 8–Position  
Plus Common Off  
http://onsemi.com  
MARKING DIAGRAMS  
The NLAST4051 is an improved version of the MC14051 and  
MC74HC4051 fabricated in sub–micron Silicon Gate CMOS  
technology for lower R  
resistance and improved linearity with  
DS(on)  
low current. This device may be operated either with a single supply or  
16  
9
dual supply up to ±3 V to pass a 6 V signal without coupling  
capacitors.  
When operating in single supply mode, it is only necessary to tie  
PP  
NLAST4051  
AWLYWW  
SO–16  
D SUFFIX  
CASE 751B  
1
8
V
EE  
, pin 7 to ground. For dual supply operation, V is tied to a  
EE  
negative voltage, not to exceed maximum ratings. Translation is  
provided in the device, the Address and Inhibit are standard TTL level  
compatible. For CMOS compatibility see NLAS4051. Pin for pin  
compatible with all industry standard versions of ‘4051.’  
16  
9
NLAST  
4051  
TSSOP–16  
DT SUFFIX  
CASE 948F  
ALYW  
Improved R  
Specifications  
DS(on)  
Pin for Pin Replacement for MAX4051 and MAX4051A  
1
8
9
– One Half the Resistance Operating at 5.0 Volts  
Single or Dual Supply Operation  
16  
– Single 3–5 Volt Operation, or Dual ±3 Volt Operation  
NLAST  
4051  
ALYW  
– With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,  
CC  
No Translators Needed  
– Address and Inhibit Logic are Over–Voltage Tolerant and May Be  
Driven Up +6 V Regardless of V  
QSOP–16  
QS SUFFIX  
CASE 492  
CC  
1
8
Address and Inhibit Pins Standard TTL Compatible  
A
L, WL  
Y
= Assembly Location  
= Wafer Lot  
= Year  
– Greatly Improved Noise Margin Over MAX4051 and MAX4051A  
– True TTL Compatibility V = 0.8 V, V = 2.0 V  
IL  
IH  
Improved Linearity Over Standard HC4051 Devices  
W
= Work Week  
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin  
Packages  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NLAST4051D  
SO–16  
SO–16  
48 Units/Rail  
NLAST4051DR2  
2500 Units/Reel  
NLAST4051DT  
NLAST4051DTR2  
NLAST4051QS  
NLAST4051QSR  
TSSOP–16  
96 Units/Rail  
TSSOP–16 2500 Units/Reel  
QSOP–16  
QSOP–16  
98 Units/Rail  
2500 Units/Reel  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
June, 2002 – Rev. 2  
NLAST4051/D  

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