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NL37WZ04USG PDF预览

NL37WZ04USG

更新时间: 2024-11-12 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
5页 69K
描述
Triple Inverter

NL37WZ04USG 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:LEAD FREE, US-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.61Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:412907
Samacsys Pin Count:8Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:NL37WZ04USG
Samacsys Released Date:2019-07-11 14:05:33Is Samacsys:N
系列:37WZJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:2.3 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:3输入次数:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装等效代码:TSSOP8,.12,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.9 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:2 mmBase Number Matches:1

NL37WZ04USG 数据手册

 浏览型号NL37WZ04USG的Datasheet PDF文件第2页浏览型号NL37WZ04USG的Datasheet PDF文件第3页浏览型号NL37WZ04USG的Datasheet PDF文件第4页浏览型号NL37WZ04USG的Datasheet PDF文件第5页 
NL37WZ04  
Triple Inverter  
The NL37WZ04 is a high performance triple inverter operating from  
a 1.65 V to 5.5 V supply. High impedance TTL compatible inputs  
significantly reduce current loading to input drivers while TTL  
compatible outputs offer improved switching noise performance.  
http://onsemi.com  
Features  
Extremely High Speed: t 2.0 ns (typical) at V = 5 V  
PD  
CC  
MARKING  
DIAGRAM  
Designed for 1.65 V to 5.5 V V Operation  
CC  
8
Over Voltage Tolerant Inputs and Outputs  
8
LVTTL Compatible − Interface Capability With 5 V TTL Logic with  
1
V
CC  
= 3 V  
US8  
L5 M G  
LVCMOS Compatible  
US SUFFIX  
CASE 493  
G
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current Substantially Reduces System  
Power Requirements  
1
Chip Complexity: FET = 72  
Pb−Free Package is Available  
L5  
M
G
= Device Code  
= Date Code*  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation may vary depending upon  
manufacturing location.  
8
7
6
1
2
V
CC  
IN A1  
PIN ASSIGNMENT  
OUT Y3  
OUT Y1  
IN A3  
1
2
IN A1  
OUT Y3  
IN A2  
3
4
5
3
4
IN A2  
GND  
GND  
OUT Y2  
IN A3  
OUT Y2  
5
6
7
8
OUT Y1  
V
CC  
Figure 1. Pinout (Top View)  
FUNCTION TABLE  
1
1
1
IN A1  
IN A2  
OUT Y1  
OUT Y2  
A Input  
Y Output  
L
H
L
H
IN A3  
OUT Y3  
Figure 2. Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 4  
NL37WZ04/D  

NL37WZ04USG 替代型号

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