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NL27WZ14DTT1 PDF预览

NL27WZ14DTT1

更新时间: 2024-09-29 22:13:11
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 99K
描述
Dual Schmitt-Trigger Inverter

NL27WZ14DTT1 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP
包装说明:TSSOP, TSOP6,.11,37针数:6
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.58
Is Samacsys:N系列:27WZ
JESD-30 代码:R-PDSO-G6JESD-609代码:e0
长度:3 mm逻辑集成电路类型:INVERTER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:2输入次数:1
端子数量:6最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSOP6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:3.3 V传播延迟(tpd):9.1 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:1.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1.5 mm
Base Number Matches:1

NL27WZ14DTT1 数据手册

 浏览型号NL27WZ14DTT1的Datasheet PDF文件第2页浏览型号NL27WZ14DTT1的Datasheet PDF文件第3页浏览型号NL27WZ14DTT1的Datasheet PDF文件第4页浏览型号NL27WZ14DTT1的Datasheet PDF文件第5页浏览型号NL27WZ14DTT1的Datasheet PDF文件第6页浏览型号NL27WZ14DTT1的Datasheet PDF文件第7页 
NL27WZ14  
Dual Schmitt−Trigger Inverter  
The NL27WZ14 is a high performance dual inverter with  
Schmitt- Trigger inputs operating from a 1.65 to 5.5 V supply.  
Pin configuration and function are the same as the NL27WZ04, but the  
inputs have hysteresis and, with its Schmitt trigger function, the  
NL27WZ14 can be used as a line receiver which will receive slow input  
signals. The NL27WZ14 is capable of transforming slowly changing input  
signals into sharply defined, jitter- free output signals. In addition, it has a  
greater noise margin than conventional inverters. The NL27WZ14 has  
hysteresis between the positive- going and the negative- going input  
thresholds (typically 1.0 V) which is determined internally by transistor  
ratios and is essentially insensitive to temperature and supply voltage  
variations.  
http://onsemi.com  
MARKING  
DIAGRAMS  
6
6
1
MAd  
SC-88/SOT-363/SC70-6  
DF SUFFIX  
Designed for 1.65 V to 5.5 V V Operation  
CC  
1
CASE 419B  
Over Voltage Tolerant Inputs and Outputs  
LVTTL Compatible - Interface Capability with 5 V TTL Logic  
6
1
with V = 3 V  
CC  
6
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
MAd  
1
Near Zero Static Supply Current Substantially Reduces System  
TSOP-6/SOT-23-6/SC59-6  
DT SUFFIX  
Power Requirements  
CASE 318G  
Current Drive Capability is 24 mA at the Outputs  
Chip Complexity: FET = 72  
MA = Device Marking  
= Date Code  
d
PIN ASSIGNMENT  
6
5
4
OUT Y1  
1
2
Pin  
Function  
IN A1  
GND  
1
IN A1  
2
3
GND  
IN A2  
V
CC  
4
5
6
OUT Y2  
3
IN A2  
OUT Y2  
V
CC  
OUT Y1  
Figure 1. Pinout (Top View)  
FUNCTION TABLE  
A Input  
Y Output  
IN A1  
IN A2  
OUT Y1  
OUT Y2  
L
H
L
H
Figure 2. Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
May, 2003 - Rev. 4  
NL27WZ14/D  

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