Datasheet > NL27WZ126_12

NL27WZ126_12

更新时间： 2024-01-28 10:13:19

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	107K
描述
Dual Buffer with 3-State Outputs

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NL27WZ126_12 数据手册

NL27WZ126

Dual Buffer with 3-State

Outputs

The NL27WZ126 is a high performance dual noninverting buffer

operating from a 1.65 V to 5.5 V supply.

Features

http://onsemi.com

MARKING

• Extremely High Speed: t 2.6 ns (typical) at V = 5.0 V

• Designed for 1.65 V to 5.5 V V Operation

DIAGRAM

• Over Voltage Tolerant Inputs and Outputs

• LVTTL Compatible − Interface Capability With 5.0 V TTL Logic

with V = 3.0 V

M2 M G

• LVCMOS Compatible

US8

US SUFFIX

CASE 493

• 24 mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current Substantially Reduces System

Power Requirements

= Device Code

= Date Code*

= Pb−Free Package

• 3−State OE Input is Active−High

• Replacement for NC7WZ126

• Chip Complexity = 72 FETs

• These Devices are Pb−Free and are RoHS Compliant

(Note: Microdot may be in either location)

*Date Code orientation may vary depending upon

manufacturing location.

PIN ASSIGNMENT

Function

GND

FUNCTION TABLE

Input

Figure 1. Pinout (Top View)

Output

X = Don’t Care

n = 1, 2

Figure 2. Logic Symbol

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Publication Order Number:

April, 2012 − Rev. 8

NL27WZ126/D

12 3 4 5 6

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