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NL17VHC1GT50DF1G PDF预览

NL17VHC1GT50DF1G

更新时间: 2024-11-25 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器栅极
页数 文件大小 规格书
8页 260K
描述
单非逆向缓冲器,TTL 电平

NL17VHC1GT50DF1G 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:TSSOP, TSSOP5/6,.08针数:5
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:1.44系列:AHC/VHC
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUFFER最大I(ol):0.008 A
湿度敏感等级:1功能数量:1
输入次数:1端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP5/6,.08封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
最大电源电流(ICC):0.04 mAProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):14.5 ns施密特触发器:NO
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:1.25 mm
Base Number Matches:1

NL17VHC1GT50DF1G 数据手册

 浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第2页浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第3页浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第4页浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第5页浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第6页浏览型号NL17VHC1GT50DF1G的Datasheet PDF文件第7页 
MC74VHC1G50  
Buffer  
The MC74VHC1G50 is an advanced high speed CMOS buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffered  
output which provides high noise immunity and stable output.  
The MC74VHC1G50 input structure provides protection when  
voltages up to 7.0 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1G50 to be used to interface 5.0 V circuits to 3.0 V  
circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
SC--88A / SOT--353/SC--70  
DF SUFFIX  
VRd  
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V  
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C  
Power Down Protection Provided on Inputs  
CASE 419A  
Pin 1  
d = Date Code  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FET = 104; Equivalent Gate = 26  
These devices are available in Pb--free package(s). Specifications herein  
apply to both standard and Pb--free devices. Please see our website at  
www.onsemi.com for specific Pb--free orderable part numbers, or  
contact your local ON Semiconductor sales office or representative.  
TSOP--5/SOT--23/SC--59  
DT SUFFIX  
VRd  
CASE 483  
Pin 1  
d = Date Code  
1
2
3
5
4
V
CC  
NC  
IN A  
GND  
PIN ASSIGNMENT  
1
2
3
4
5
NC  
IN A  
GND  
OUT Y  
OUT Y  
V
CC  
FUNCTION TABLE  
Figure 1. Pinout (Top View)  
A Input  
Y Output  
L
L
H
H
1
IN A  
OUT Y  
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 4 of this data sheet.  
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 -- Rev. 12  
MC74VHC1G50/D  

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