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NL17SZ38MU1TCG PDF预览

NL17SZ38MU1TCG

更新时间: 2024-11-27 02:51:11
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
10页 266K
描述
2-Input NAND Gate, Open Drain Output

NL17SZ38MU1TCG 数据手册

 浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第2页浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第3页浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第4页浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第5页浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第6页浏览型号NL17SZ38MU1TCG的Datasheet PDF文件第7页 
2-Input NAND Gate,  
Open Drain Output  
NL17SZ38  
The NL17SZ38 is a single 2Input NAND gate with open drain  
output operating from a 1.65 V to 5.5 V supply.  
Features  
www.onsemi.com  
Designed for 1.65 V to 5.5 V V Operation  
CC  
MARKING  
DIAGRAMS  
2.4 ns t at V = 5 V (Typ)  
PD  
CC  
Inputs/Outputs Overvoltage Tolerant up to 5.5 V  
6
I  
Supports Partial Power Down Protection  
Sink 32 mA at 4.5 V  
OFF  
SC88  
CASE 419B02  
XXXM G  
G
Available in SC88, SC74 and UDFN6 Packages  
1
1
Chip Complexity < 100 FETs  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
SC74  
CASE 318F05  
Compliant  
XXX MG  
6
G
1
IEEC / IEC  
A
B
&
Y
UDFN6  
1.45 x 1.0  
CASE 517AQ  
XM  
1
Figure 1. Logic Symbol  
UDFN6  
1.0 x 1.0  
CASE 517BX  
X M  
1
X, XXX = Specific Device Code  
M
W
G
= Date Code*  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
December, 2019 Rev. 0  
NL17SZ38/D  

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