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NIMD6302R2G

更新时间： 2024-11-09 21:20:27
品牌 Logo 应用领域
安森美 - ONSEMI 开关光电二极管晶体管
页数 文件大小 规格书
9页 86K
描述
6500mA, 30V, 4 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, CASE 751-07, SOIC-8

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NIMD6302R2G 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：SOT包装说明：CASE 751-07, SOIC-8
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99风险等级：5.37
其他特性：ESD PROTECTED外壳连接：ISOLATED
配置：COMPLEX最小漏源击穿电压：30 V
最大漏极电流 (ID)：6.5 A最大漏源导通电阻：0.05 Ω
FET 技术：METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss)：200 pF
JESD-30 代码：R-PDSO-G8湿度敏感等级：1
元件数量：4端子数量：8
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：N-CHANNEL
认证状态：Not Qualified表面贴装：YES
端子形式：GULL WING端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

NIMD6302R2G 数据手册

 浏览型号NIMD6302R2G的Datasheet PDF文件第2页浏览型号NIMD6302R2G的Datasheet PDF文件第3页浏览型号NIMD6302R2G的Datasheet PDF文件第4页浏览型号NIMD6302R2G的Datasheet PDF文件第5页浏览型号NIMD6302R2G的Datasheet PDF文件第6页浏览型号NIMD6302R2G的Datasheet PDF文件第7页 
NIMD6302R2  
HDPlus Dual N−Channel  
Self−protected Field Effect  
Transistors with 1:200  
Current Mirror FET  
HDPlus devices are an advanced HDTMOS™ series of power  
MOSFET which utilize ON’s latest MOSFET technology process to  
achieve the lowest possible on−resistance per silicon area while  
incorporating smart features. They are capable of withstanding high  
energy in the avalanche and commutation modes. The avalanche  
energy is specified to eliminate guesswork in designs where inductive  
loads are switched and offer additional safety margin against  
unexpected voltage transients.  
http://onsemi.com  
5.0 AMPERES  
30 VOLTS  
RDS(on) = 50 mW  
ISOLATED DUAL PACKAGING  
Drain1  
Drain2  
This HDPlus device features an integrated Gate−to−Source clamp  
for ESD protection. Also, this device features a mirror FET for current  
monitoring.  
•
•
3.5% Current Mirror Accuracy in Linear Region  
Main  
FET  
Main  
FET  
Mirror  
Mirror  
Gate1  
Gate2  
15% Current Mirror Accuracy in Low Current Saturation Region  
• IDSS Specified at Elevated Temperature  
• Avalanche Energy Specified  
• Current Sense FET  
• ESD Protected on the Main and the Mirror FET  
Mirror1 Source1  
Mirror2  
Source2  
ABSOLUTE MAXIMUM RATINGS  
Stresses beyond those listed may cause permanent damage to the device.  
These are stress ratings only and functional operation of the device at these  
or any other conditions beyond those indicated in this specification is not  
implied. Exposure to absolute maximum rated conditions for extended peri-  
ods may affect device reliability.  
SOIC−8  
CASE 751  
STYLE 19  
MAIN MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
MARKING DIAGRAM  
Rating  
Symbol Value Unit  
8
7
6
5
Drain−to−Source Voltage  
V
30  
30  
Vdc  
Vdc  
Vdc  
1
2
3
4
DSS  
DGR  
Source 1  
Gate 1  
Mirror 1  
Drain 1  
Drain−to−Gate Voltage (R = 1.0 MW)  
V
GS  
Gate−to−Source Voltage  
V
"16  
GS  
Source 2  
Gate 2  
Mirror 2  
Drain 2  
Drain Current  
− Continuous @ T = 25°C  
I
I
6.5  
4.4  
33  
Adc  
Adc  
Apk  
A
D
D
− Continuous @ T = 100°C (Note 3)  
(Top View)  
A
I
− Pulsed (t v10 ms)  
DM  
p
N6302 = Specific Device Code  
Total Power Dissipation @ T = 25°C (Note 1)  
P
P
1.3  
1.67  
W
A
D
D
A
Y
= Assembly Location  
= Year  
Total Power Dissipation @ T = 25°C (Note 2)  
A
Thermal Resistance  
°C/W  
WW  
= Work Week  
Junction−to−Ambient (Note 1)  
Junction−to−Ambient (Note 2)  
R
q
96  
75  
JA  
JA  
R
q
Single Pulse Drain−to−Source Avalanche  
Energy (Note 3)  
E
250  
mJ  
ORDERING INFORMATION  
AS  
(V = 25 Vdc, V = 10 Vdc,  
Device  
Package  
Shipping  
DD  
GS  
V
= 20 Vdc, I = 15 Apk, L = 10 mH, R =  
DS  
L G  
25 W)  
NIMD6302R2  
SOIC−8  
2500/Tape & Reel  
1. Mounted onto min pad board.  
2. Mounted onto 1″ pad board.  
3. Switching characteristics are independent of operating junction tempera-  
tures.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 − Rev. 4  
NIMD6302R2/D  
 
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