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2SJ621 PDF预览

2SJ621

更新时间: 2024-02-25 01:04:09
品牌 Logo 应用领域
日电电子 - NEC 晶体小信号场效应晶体管开关光电二极管
页数 文件大小 规格书
8页 74K
描述
MOS FIELD EFFECT TRANSISTOR

2SJ621 技术参数

是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:compliant风险等级:5.61
配置:Single最大漏极电流 (Abs) (ID):3.5 A
FET 技术:METAL-OXIDE SEMICONDUCTOR工作模式:ENHANCEMENT MODE
最高工作温度:150 °C极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):1.25 W子类别:Other Transistors
表面贴装:YESBase Number Matches:1

2SJ621 数据手册

 浏览型号2SJ621的Datasheet PDF文件第2页浏览型号2SJ621的Datasheet PDF文件第3页浏览型号2SJ621的Datasheet PDF文件第4页浏览型号2SJ621的Datasheet PDF文件第5页浏览型号2SJ621的Datasheet PDF文件第6页浏览型号2SJ621的Datasheet PDF文件第7页 
DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
2SJ621  
P-CHANNEL MOS FIELD EFFECT TRANSISTOR  
FOR SWITCHING  
DESCRIPTION  
PACKAGE DRAWING (Unit: mm)  
The 2SJ621 is a switching device which can be driven directly  
by a 1.8 V power source.  
+0.1  
–0.05  
0.4  
+0.1  
–0.06  
0.16  
This device features a low on-state resistance and excellent  
switching characteristics, and is suitable for applications such  
as power switch of portable machine and so on.  
3
0 to 0.1  
FEATURES  
1.8 V drive available  
1
2
Low on-state resistance  
RDS(on)1 = 44 mMAX. (VGS = –4.5 V, ID = –2.0 A)  
RDS(on)2 = 56 mMAX. (VGS = –3.0 V, ID = –2.0 A)  
RDS(on)3 = 62 mMAX. (VGS = –2.5 V, ID = –2.0 A)  
RDS(on)4 = 105 mMAX. (VGS = –1.8 V, ID = –1.5 A)  
0.65  
0.95 0.95  
1.9  
0.9 to 1.1  
2.9 ±0.2  
1
: Gate  
ORDERING INFORMATION  
2 : Source  
3 : Drain  
PART NUMBER  
2SJ621  
PACKAGE  
SC-96 (Mini Mold Thin Type)  
Marking: XG  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC) (TA = 25°C)  
Drain Current (pulse) Note1  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
–12  
V
V
EQUIVALENT CIRCUIT  
m8.0  
m3.5  
Drain  
A
A
m12  
0.2  
Body  
Total Power Dissipation (TA = 25°C)  
Total Power Dissipation (TA = 25°C) Note2  
Channel Temperature  
W
W
°C  
Diode  
Gate  
PT2  
1.25  
150  
Tch  
Gate  
Protection  
Diode  
Storage Temperature  
Tstg  
–55 to +150 °C  
Source  
Notes 1. PW 10 µs, Duty Cycle 1%  
2. Mounted on FR-4 board, t 5 sec.  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When  
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated  
voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No.  
Date Published May 2002 NS CP(K)  
Printed in Japan  
D15634EJ1V0DS00 (1st edition)  
©
2001  

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