2SJ243

更新时间： 2024-02-19 09:43:20

品牌	Logo	应用领域
日电电子 - NEC		晶体小信号场效应晶体管开关光电二极管
页数	文件大小	规格书
6页	63K
描述
P-CHANNEL MOS FET FOR SWITCHING

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技术参数
数据手册

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2SJ243 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	风险等级：	5.84
配置：	Single	最大漏极电流 (Abs) (ID)：	0.1 A
FET 技术：	METAL-OXIDE SEMICONDUCTOR	工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C	极性/信道类型：	P-CHANNEL
最大功率耗散 (Abs)：	0.2 W	子类别：	Other Transistors
表面贴装：	YES	Base Number Matches：	1

2SJ243 数据手册

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

2SJ243

P-CHANNEL MOS FET

FOR SWITCHING

The 2SJ243 is a P-channel vertical type MOS FET that is driven

at 2.5 V.

Because this MOS FET can be driven on a low voltage and

PACKAGE DIMENSIONS (in mm)

0.3 ± 0.05

+0.1

–0.05

0.1

because it is not necessary to consider the drive current, the

2SJ243 is ideal for driving the actuator of power-saving systems,

such as VCR cameras and headphone stereo systems.

Moreover, the 2SJ243 is housed in a super small mini-mold

package so that it can help increase the mounting density on the

printed circuit board and lower the mounting cost, contributing to

miniaturization of the application systems.

0 to 0.1

+0.1

–0

0.2

0.5

0.6

0.5

0.75 ± 0.05

1.0

1.6 ± 0.1

FEATURES

•

Small mounting area: about 60 % of the conventional mini-mold

package (SC-70)

EQUIVALENT CIRCUIT

•

Can be directly driven by 3-V IC

Can be automatically mounted

Drain (D)

The internal diode in the right figure is a parasitic diode.

The protection diode is to protect the product from damage

Gate (G)

Internal diode

due to static electricity. If there is a danger that an extremely

high voltage will be applied across the gate and source in the

actual circuit, a gate protection circuit such as an external

constant-voltage diode is necessary.

Gate protection

diode

PIN CONNECTIONS

S: Source

D: Drain

G: Gate

Source (S)

Marking: A1

ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)

PARAMETER

Drain to Source Voltage

Gate to Source Voltage

Drain Current (DC)

SYMBOL

VDSS

TEST CONDITIONS

RATING

UNIT

VGS = 0

VDS = 0

–30

±7

VGSS

ID(DC)

±100

±200

Drain Current (Pulse)

ID(pulse)

PW ≤ 10 ms

Duty cycle ≤ 50 %

Total Power Dissipation

Channel Temperature

Operating Temperature

Storage Temperature

3.0 cm²× 0.64 mm, ceramic substrate used

200

150

˚C

Tch

Topt

Tstg

–55 to +80

–55 to +150

˚C

Document No. D11215EJ1V0DS00 (1st edition)

Date Published June 1996 P

Printed in Japan

1996

12 3 4 5 6

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