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NE555PS

更新时间： 2024-11-24 13:11:59
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
15页 227K
描述
Single Precision Timer 8-SO

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NE555PS 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：SOP,
Reach Compliance Code：compliantFactory Lead Time：6 weeks
风险等级：5.63模拟集成电路 - 其他类型：PULSE; RECTANGULAR
JESD-30 代码：R-PDSO-G8JESD-609代码：e4
长度：6.2 mm湿度敏感等级：1
功能数量：1端子数量：8
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
座面最大高度：2 mm最大供电电压 (Vsup)：16 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：5.3 mmBase Number Matches：1

NE555PS 数据手册

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NE555, NE555Y, SA555, SE555, SE555C  
PRECISION TIMERS  
SLFS022 – D1669, SEPTEMBER 1973—REVISED FEBRUARY 1992  
D, JG, OR P PACKAGE  
(TOP VIEW)  
•
•
•
•
Timing From Microseconds to Hours  
Astable or Monostable Operation  
Adjustable Duty Cycle  
GND  
TRIG  
V
CC  
1
2
3
4
8
7
6
5
DISCH  
THRES  
CONT  
OUT  
TTL-Compatible Output Can Sink or  
Source up to 200 mA  
RESET  
•
Functionally Interchangeable With the  
Signetics NE555, SA555, SE555, SE555C;  
Have Same Pinout  
FK PACKAGE  
(TOP VIEW)  
SE555C FROM TI IS NOT RECOMMENDED  
FOR NEW DESIGNS  
3
2
1
20 19  
18  
NC  
NC  
4
5
6
7
8
description  
DISCH  
NC  
TRIG  
NC  
17  
16  
15  
14  
These devices are precision monolithic timing  
circuits capable of producing accurate time delays  
or oscillation. In the time-delay or monostable  
mode of operation, the timed interval is controlled  
by a single external resistor and capacitor  
network. In the astable mode of operation, the  
frequency and duty cycle may be independently  
controlled with two external resistors and a single  
external capacitor.  
THRES  
NC  
OUT  
NC  
9 10 11 12 13  
NC–No internal connection  
The threshold and trigger levels are normally two-thirds and one-third, respectively, of V . These levels can  
CC  
be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop  
is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above the  
threshold level, the flip-flop is reset and the output is low. RESET can override all other inputs and can be used  
to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low. Whenever  
the output is low, a low-impedance path is provided between DISCH and ground.  
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of  
5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.  
The NE555 is characterized for operation from 0°C to 70°C. The SA555 is characterized for operation from  
–40°C to 85°C. The SE555 and SE555C are characterized for operation over the full military range of –55°C  
to 125°C.  
AVAILABLE OPTIONS  
PACKAGE  
CHIP FORM  
T
V
V
max  
SMALL OUTLINE  
(D)  
CHIP CARRIER  
(FK)  
CERAMIC DIP  
(J)  
PLASTIC DIP  
(P)  
A
THRES  
= 15 V  
(Y)  
CC  
11.2 V  
0°C to 70°C  
NE555D  
SA555D  
NE555P  
SA555P  
–40°C to 85°C  
11.2 V  
NE555Y  
10.6 V  
11.2 V  
SE555D  
SE555CD  
SE555FK  
SE555CFK  
SE555JG  
SE555CJG  
SE555P  
–55°C to 125°C  
SE555CP  
The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR).  
PRODUCTION DATA informationis currentas ofpublicationdate. Products  
Copyright 1991, Texas Instruments Incorporated  
conform to specifications per the terms of Texas Instruments standard  
warranty. Production processing does notnecessarily include testing ofall  
parameters.  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1
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