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NDS9959 PDF预览

NDS9959

更新时间: 2024-09-28 20:26:31
品牌 Logo 应用领域
安森美 - ONSEMI 开关脉冲光电二极管晶体管
页数 文件大小 规格书
7页 209K
描述
Power Field-Effect Transistor

NDS9959 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:5.73Is Samacsys:N
Base Number Matches:1

NDS9959 数据手册

 浏览型号NDS9959的Datasheet PDF文件第2页浏览型号NDS9959的Datasheet PDF文件第3页浏览型号NDS9959的Datasheet PDF文件第4页浏览型号NDS9959的Datasheet PDF文件第5页浏览型号NDS9959的Datasheet PDF文件第6页浏览型号NDS9959的Datasheet PDF文件第7页 
February 1996  
NDS9959  
Dual N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild's proprietary, high cell  
density, DMOS technology. This very high density process is  
especially tailored to minimize on-state resistance, provide  
superior switching performance, and withstand high energy  
pulses in the avalanche and commutation modes. These  
devices are particularly suited for low voltage applications such  
as DC motor control and DC/DC conversion where fast  
switching, low in-line power loss, and resistance to transients  
are needed.  
2.0A, 50V. RDS(ON) = 0.3W @ VGS = 10V  
High density cell design for extremely low RDS(ON)  
.
High power and current handling capability in a widely used  
surface mount package.  
Dual MOSFET in surface mount package.  
_________________________________________________________________________________  
4
3
2
1
5
6
7
8
Absolute Maximum Ratings  
TA = 25°C unless otherwise noted  
Symbol Parameter  
NDS9959  
50  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
V
V
A
VDSS  
VGSS  
ID  
± 20  
Drain Current - Continuous @ TA = 25°C  
- Continuous @ TA = 70°C  
(Note 1a)  
(Note 1a)  
± 2.0  
± 1.6  
- Pulsed  
@ TA = 25°C  
± 8  
Power Dissipation for Dual Operation  
Power Dissipation for Single Operation  
2
1.6  
W
PD  
(Note 1a)  
(Note 1b)  
(Note 1c)  
1
0.9  
Operating and Storage Temperature Range  
-55 to 150  
°C  
TJ,TSTG  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
78  
40  
°C/W  
°C/W  
R
JA  
q
R
JC  
q
© 1997 Fairchild Semiconductor Corporation  
NDS9959.SAM  

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