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NDP7060_NL PDF预览

NDP7060_NL

更新时间: 2024-09-21 13:11:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 晶体晶体管开关脉冲局域网
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12页 361K
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NDP7060_NL 数据手册

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May 1996  
NDP7060 / NDB7060  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild's proprietary, high cell  
density, DMOS technology. This very high density process is  
especially tailored to minimize on-state resistance, provide  
superior switching performance, and withstand high energy  
pulses in the avalanche and commutation modes. These  
devices are particularly suited for low voltage applications such  
as automotive, DC/DC converters, PWM motor controls, and  
other battery powered circuits where fast switching, low in-line  
power loss, and resistance to transients are needed.  
75A, 60V. RDS(ON) = 0.013W @ VGS=10V.  
Critical DC electrical parameters specified at elevated  
temperature.  
Rugged internal source-drain diode can eliminate the need  
for an external Zener diode transient suppressor.  
175°C maximum junction temperature rating.  
High density cell design for extremely low RDS(ON)  
TO-220 and TO-263 (D2PAK) package for both through hole  
and surface mount applications.  
.
________________________________________________________________________________  
D
G
S
Absolute Maximum Ratings  
Symbol Parameter  
TC = 25°C unless otherwise noted  
NDP7060  
NDB7060  
Units  
V
VDSS  
VDGR  
Drain-Source Voltage  
60  
60  
V
Drain-Gate Voltage (RGS < 1 MW)  
VGSS  
Gate-Source Voltage - Continuous  
± 20  
± 40  
75  
V
- Nonrepetitive (tP < 50 µs)  
Drain Current - Continuous  
A
ID  
- Pulsed  
225  
150  
W
W/°C  
°C  
PD  
Maximum Power Dissipation @ TC = 25°C  
Derate above 25°C  
1
Operating and Storage Temperature Range  
-65 to 175  
275  
TJ,TSTG  
TL  
Maximum lead temperature for soldering purposes,  
1/8" from case for 5 seconds  
°C  
© 1997 Fairchild Semiconductor Corporation  
NDP7060.SAM  

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