Datasheet > 逻辑 > 栅极> NC7WP16P6X

NC7WP16P6X

更新时间： 2024-01-12 21:13:18

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		栅极逻辑集成电路光电二极管
页数	文件大小	规格书
9页	186K
描述
TINYLOGIC-R ULP DUAL BUFFER (PRELIMINARY)

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技术参数
数据手册

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NC7WP16P6X 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SOIC	包装说明：	TSSOP,
针数：	6	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.84
Is Samacsys：	N	系列：	P
JESD-30 代码：	R-PDSO-G6	JESD-609代码：	e3
长度：	2 mm	逻辑集成电路类型：	BUFFER
湿度敏感等级：	1	功能数量：	2
输入次数：	1	端子数量：	6
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：	46.3 ns	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	0.9 V	标称供电电压 (Vsup)：	1.2 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	1.25 mm
Base Number Matches：	1

NC7WP16P6X 数据手册

Preliminary

September 2003

Revised March 2004

NC7WP16

TinyLogic ULP Dual Buffer (Preliminary)

General Description

Features

The NC7WP16 is a dual buffer from Fairchild’s Ultra Low

Power (ULP) Series of TinyLogic . Ideal for applications

where battery life is critical, this product is designed for

ultra low power consumption within the V_CCoperating

■ 0.9V to 3.6V V_CCsupply operation

■ 3.6V overvoltage tolerant I/O’s at V_CCfrom 0.9V to 3.6V

■ t_PD

range of 0.9V to 3.6V V_CC

4.0 ns typ for 3.0V to 3.6V V_CC

5.0 ns typ for 2.3V to 2.7V V_CC

6.0 ns typ for 1.65V to 1.95V V_CC

7.0 ns typ for 1.40V to 1.60V V_CC

11.0 ns typ for 1.10V to 1.30V V_CC

27.0 ns typ for 0.90V V_CC

The internal circuit is composed of a minimum of inverter

stages, including the output buffer, to enable ultra low static

and dynamic power.

The NC7WP16, for lower drive requirements, is uniquely

designed for optimized power and speed, and is fabricated

with an advanced CMOS technology to achieve best in

class speed operation while maintaining extremely low

CMOS power dissipation.

■ Power-Off high impedance inputs and outputs

■ Static Drive (I_OH/I_OL

)

±2.6 mA @ 3.00V V_CC

±2.1 mA @ 2.30V V_CC

±1.5 mA @ 1.65V V_CC

±1.0 mA @ 1.40V V_CC

±0.5 mA @ 1.10V V_CC

±20 µA @ 0.9V V_CC

■ Uses patented Quiet Series noise/EMI reduction

circuitry

■ Ultra small MicroPak leadfree package

■ Ultra low dynamic power

Ordering Code:

Package

Number

MAA06A

MAC06A

Product Code

Top Mark

P16

Order Number

Package Description

Supplied As

NC7WP16P6X

NC7WP16L6X

6-Lead SC70, EIAJ SC88, 1.25mm Wide

6-Lead MicroPak, 1.0mm Wide

3k Units on Tape and Reel

5k Units on Tape and Reel

Battery Life vs. V Supply Voltage

TinyLogic ULP and ULP-A with up to 50% less power consumption can

extend your battery life significantly.

Battery Life = (V_battery*I_battery*.9)/(P_device)/24hrs/day

Where, P_device= (I_CC* V_CC) + (C_PD+ C_L) * V_CC²* f

Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and

derated 90% and device frequency at 10MHz, with C_L= 15 pF load

TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.

Quiet Series and MicroPak are trademarks of Fairchild Semiconductor Corporation.

DS500848

www.fairchildsemi.com

12 3 4 5 6 7...9

中文翻译

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与NC7WP16P6X相关器件

型号	品牌	获取价格	描述	数据表
NC7WP240	FAIRCHILD	获取价格	TinyLogic ULP Dual Inverting Buffer with 3-STATE Outputs
NC7WP240K8X	FAIRCHILD	获取价格	TinyLogic ULP Dual Inverting Buffer with 3-STATE Outputs
NC7WP240L8X	FAIRCHILD	获取价格	TinyLogic ULP Dual Inverting Buffer with 3-STATE Outputs
NC7WP32	FAIRCHILD	获取价格	TinyLogic ULP Dual 2-Input OR Gate
NC7WP32K8X	FAIRCHILD	获取价格	TinyLogic ULP Dual 2-Input OR Gate
NC7WP32K8X	ONSEMI	获取价格	TinyLogic ULP 2 输入或门
NC7WP32K8X_NL	FAIRCHILD	获取价格	OR Gate, P Series, 2-Func, 2-Input, CMOS, PDSO8, 3.10 MM, LEAD FREE, MO-187CA, US-8
NC7WP32L8X	FAIRCHILD	获取价格	TinyLogic ULP Dual 2-Input OR Gate
NC7WP32L8X	ONSEMI	获取价格	TinyLogic ULP 2 输入或门
NC7WP86	FAIRCHILD	获取价格	TinyLogic ULP Dual 2-Input Exclusive OR Gate

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