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NC7SZ32P5X-G PDF预览

NC7SZ32P5X-G

更新时间: 2024-11-26 13:11:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
9页 108K
描述
Gate

NC7SZ32P5X-G 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:NBase Number Matches:1

NC7SZ32P5X-G 数据手册

 浏览型号NC7SZ32P5X-G的Datasheet PDF文件第2页浏览型号NC7SZ32P5X-G的Datasheet PDF文件第3页浏览型号NC7SZ32P5X-G的Datasheet PDF文件第4页浏览型号NC7SZ32P5X-G的Datasheet PDF文件第5页浏览型号NC7SZ32P5X-G的Datasheet PDF文件第6页浏览型号NC7SZ32P5X-G的Datasheet PDF文件第7页 
September 1996  
Revised March 2002  
NC7SZ32  
TinyLogic UHS 2-Input OR Gate  
General Description  
Features  
The NC7SZ32 is a single 2-Input OR Gate from Fairchild’s  
Ultra High Speed Series of TinyLogic . The device is fabri-  
cated with advanced CMOS technology to achieve ultra  
high speed with high output drive while maintaining low  
static power dissipation over a very broad VCC operating  
Space saving SOT23 or SC70 5-lead package  
Ultra small MicroPak leadless package  
Ultra high speed tPD 2.4 ns Typ into 50 pF at 5V VCC  
High output drive ±24 mA at 3V VCC  
Broad VCC operating range 1.65V5.5V  
range. The device is specified to operate over the 1.65V to  
5.5V VCC range. The inputs and output are high impedance  
Matches the performance of LCX when operated at  
3.3V VCC  
when VCC is 0V. Inputs tolerate voltages up to 6V indepen-  
dent of VCC operating voltage.  
Power down high impedance inputs/output  
Overvoltage tolerant inputs facilitate 5V3V translation  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Package  
Number  
MA05B  
Product Code  
Top Mark  
7Z32  
Order Number  
Package Description  
Supplied As  
NC7SZ32M5X  
NC7SZ32P5X  
NC7SZ32L6X  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
3k Units on Tape and Reel  
MAA05A  
MAC06A  
Z32  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel  
HH  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignments for SC70 and SOT23  
Pin Descriptions  
Pin Names  
Description  
Inputs  
A, B  
Y
(Top View)  
Output  
Pad Assignments for MicroPak  
NC  
No Connect  
Function Table  
Y = A + B  
Input  
Output  
A
L
B
L
Y
L
L
H
L
H
H
H
(Top Thru View)  
H
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
TinyLogic and MicroPak are trademarks of Fairchild Semiconductor Corporation.  
© 2002 Fairchild Semiconductor Corporation  
DS012154  
www.fairchildsemi.com  

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