5秒后页面跳转
NC7SP17FHX PDF预览

NC7SP17FHX

更新时间: 2024-01-10 16:39:56
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 696K
描述
TinyLogic ULP Single Buffer with Schmitt Trigger Input

NC7SP17FHX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SON
包装说明:1 X 1MM, 0.35 MM PITCH, GREEN, MO-252, MICROPAK2-6针数:6
Reach Compliance Code:unknown风险等级:5.73
Is Samacsys:N系列:P
JESD-30 代码:S-PDSO-N6JESD-609代码:e4
长度:1 mm逻辑集成电路类型:BUFFER
湿度敏感等级:1功能数量:1
输入次数:1端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装形状:SQUARE封装形式:SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):46.3 ns
座面最大高度:0.55 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.9 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:NO LEAD端子节距:0.35 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1 mmBase Number Matches:1

NC7SP17FHX 数据手册

 浏览型号NC7SP17FHX的Datasheet PDF文件第2页浏览型号NC7SP17FHX的Datasheet PDF文件第3页浏览型号NC7SP17FHX的Datasheet PDF文件第4页浏览型号NC7SP17FHX的Datasheet PDF文件第5页浏览型号NC7SP17FHX的Datasheet PDF文件第6页浏览型号NC7SP17FHX的Datasheet PDF文件第7页 
February 2011  
NC7SP17  
TinyLogic® ULP Single Buffer with Schmitt Trigger Input  
Features  
Description  
The NC7SP17 is a single buffer with Schmitt trigger  
input from Fairchild’s Ultra Low Power (ULP) series of  
TinyLogic®. Ideal for applications where battery life is  
critical, this product is designed for ultra low power  
consumption within the VCC operating range of 0.9V to  
.
.
0.9V to 3.6V VCC Supply Operation  
3.6V Over-Voltage Tolerant I/Os at VCC from  
0.9V to 3.6V  
.
Propagation Delay (tPD):  
3.6V VCC  
.
4.0ns Typical for 3.0V to 3.6V VCC  
5.0ns Typical for 2.3V to 2.7V VCC  
6.0ns Typical for 1.65V to 1.95V VCC  
7.0ns Typical for 1.40V to 1.60V VCC  
11.0ns Typical for 1.10V to 1.30V VCC  
27.0ns Typical for 0.90V VCC  
The internal circuit is composed of a minimum of  
inverter stages, including the output buffer, to enable  
ultra low static and dynamic power.  
The NC7SP17, for lower drive requirements, is uniquely  
designed for optimized power and speed and is  
fabricated with an advanced CMOS technology to  
achieve best-in-class speed of operation, while  
maintaining extremely low CMOS power dissipation.  
.
.
Power-Off High-Impedance Inputs and Outputs  
Static Drive (IOH/IOL):  
± 2.6mA at 3.00V VCC  
± 2.1mA at 2.30V VCC  
± 1.5mA at 1.65V VCC  
± 1.0mA at 1.40V VCC  
± 0.5mA at 1.10V VCC  
± 20µA at 0.9V VCC  
.
.
.
Quiet Series™ Noise / EMI Reduction Circuitry  
Ultra Small MicroPak™ Packages  
Ultra Low Dynamic Power  
Ordering Information  
Part Number  
NC7SP17P5X  
NC7SP17L6X  
NC7SP17FHX  
Top Mark  
Package  
Packing Method  
P17  
K4  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide  
6-Lead MicroPak™, 1.00mm Wide  
3000 Units on Tape & Reel  
5000 Units on Tape & Reel  
K4  
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel  
© 2001 Fairchild Semiconductor Corporation  
NC7SP17 • Rev. 1.0.4  
www.fairchildsemi.com  

与NC7SP17FHX相关器件

型号 品牌 获取价格 描述 数据表
NC7SP17FHX_11 FAIRCHILD

获取价格

TinyLogic® ULP Single Buffer with Schmitt Tr
NC7SP17L6X FAIRCHILD

获取价格

TinyLogic ULP Single Buffer with Schmitt Trigger Input
NC7SP17L6X ROCHESTER

获取价格

P SERIES, 1-INPUT NON-INVERT GATE, PDSO6, 1 MM, ROHS COMPLIANT, MO-252UAAD, MICROPAK-6
NC7SP17L6X ONSEMI

获取价格

TinyLogic ULP单通道缓冲器(带施密特触发器输入)
NC7SP17L6X_11 FAIRCHILD

获取价格

TinyLogic® ULP Single Buffer with Schmitt Tr
NC7SP17L6X-L22780 ONSEMI

获取价格

TinyLogic ULP单通道缓冲器(带施密特触发器输入)
NC7SP17P5X FAIRCHILD

获取价格

TinyLogic ULP Single Buffer with Schmitt Trigger Input
NC7SP17P5X ONSEMI

获取价格

TinyLogic ULP单通道缓冲器(带施密特触发器输入)
NC7SP17P5X_11 FAIRCHILD

获取价格

TinyLogic® ULP Single Buffer with Schmitt Tr
NC7SP17P5X_NL FAIRCHILD

获取价格

Buffer, P Series, 1-Func, 1-Input, CMOS, PDSO5, 1.25 MM, ROHS COMPLIANT, EIAJ, SC-88A, SC-