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NC7S32M5_NL PDF预览

NC7S32M5_NL

更新时间: 2024-10-31 13:11:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
7页 82K
描述
OR Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5, 1.60 MM, LEAD FREE, MO-178, SOT-23, 5 PIN

NC7S32M5_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:LSSOP,针数:5
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.09系列:HC/UH
JESD-30 代码:R-PDSO-G5长度:2.9 mm
逻辑集成电路类型:OR GATE功能数量:1
输入次数:2端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
传播延迟(tpd):125 ns认证状态:Not Qualified
座面最大高度:1.4 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
宽度:1.6 mmBase Number Matches:1

NC7S32M5_NL 数据手册

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October 1995  
Revised June 2000  
NC7S32  
TinyLogic HS 2-Input OR Gate  
General Description  
Features  
The NC7S32 is a single 2-Input high performance CMOS  
OR Gate. Advanced Silicon Gate CMOS fabrication  
assures high speed and low power circuit operation over a  
broad VCC range. ESD protection diodes inherently guard  
Space saving SOT23 or SC70 5-lead package  
High Speed; tPD 3.5 ns typ  
Low Quiescent Power; ICC < 1 µA  
Balanced Output Drive; 2 mA IOL, 2 mA IOH  
Broad VCC Operating Range: 2V–6V  
both inputs and output with respect to the VCC and GND  
rails. Three stages of gain between inputs and outputs  
assures high noise immunity and reduced sensitivity to  
input edge rate.  
Balanced Propagation Delays  
Specified for 3V Operation  
Ordering Code:  
Package  
Number  
MA05B  
Product Code  
Top Mark  
7S32  
Order Number  
Package Description  
Supplied As  
NC7S32M5  
NC7S32M5X  
NC7S32P5  
NC7S32P5X  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
250 Units on Tape and Reel  
3k Units on Tape and Reel  
MA05B  
7S32  
MAA05A  
MAA05A  
S32  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
S32  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
(Top View)  
Pin Descriptions  
Function Table  
Pin Names  
Description  
Inputs  
Y = A + B  
A, B  
Y
Inputs  
Output  
Output  
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
TinyLogic is a trademark of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS012137  
www.fairchildsemi.com  

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