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NC7S32CW PDF预览

NC7S32CW

更新时间: 2024-10-31 13:00:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
7页 82K
描述
OR Gate, HC/UH Series, 1-Func, 2-Input, CMOS

NC7S32CW 技术参数

生命周期:Obsolete包装说明:DIE,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72系列:HC/UH
JESD-30 代码:R-XUUC-N5逻辑集成电路类型:OR GATE
功能数量:1输入次数:2
端子数量:5封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP传播延迟(tpd):100 ns
认证状态:Not Qualified最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V表面贴装:YES
技术:CMOS端子形式:NO LEAD
端子位置:UPPERBase Number Matches:1

NC7S32CW 数据手册

 浏览型号NC7S32CW的Datasheet PDF文件第2页浏览型号NC7S32CW的Datasheet PDF文件第3页浏览型号NC7S32CW的Datasheet PDF文件第4页浏览型号NC7S32CW的Datasheet PDF文件第5页浏览型号NC7S32CW的Datasheet PDF文件第6页浏览型号NC7S32CW的Datasheet PDF文件第7页 
October 1995  
Revised June 2000  
NC7S32  
TinyLogic HS 2-Input OR Gate  
General Description  
Features  
The NC7S32 is a single 2-Input high performance CMOS  
OR Gate. Advanced Silicon Gate CMOS fabrication  
assures high speed and low power circuit operation over a  
broad VCC range. ESD protection diodes inherently guard  
Space saving SOT23 or SC70 5-lead package  
High Speed; tPD 3.5 ns typ  
Low Quiescent Power; ICC < 1 µA  
Balanced Output Drive; 2 mA IOL, 2 mA IOH  
Broad VCC Operating Range: 2V–6V  
both inputs and output with respect to the VCC and GND  
rails. Three stages of gain between inputs and outputs  
assures high noise immunity and reduced sensitivity to  
input edge rate.  
Balanced Propagation Delays  
Specified for 3V Operation  
Ordering Code:  
Package  
Number  
MA05B  
Product Code  
Top Mark  
7S32  
Order Number  
Package Description  
Supplied As  
NC7S32M5  
NC7S32M5X  
NC7S32P5  
NC7S32P5X  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
250 Units on Tape and Reel  
3k Units on Tape and Reel  
MA05B  
7S32  
MAA05A  
MAA05A  
S32  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
S32  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
(Top View)  
Pin Descriptions  
Function Table  
Pin Names  
Description  
Inputs  
Y = A + B  
A, B  
Y
Inputs  
Output  
Output  
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
H = HIGH Logic Level  
L = LOW Logic Level  
TinyLogic is a trademark of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS012137  
www.fairchildsemi.com  

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