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NBSG14/D PDF预览

NBSG14/D

更新时间: 2024-11-11 23:53:19
品牌 Logo 应用领域
其他 - ETC 驱动器时钟
页数 文件大小 规格书
12页 358K
描述
2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs

NBSG14/D 数据手册

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NBSG14  
2.5V/3.3VꢀSiGe Differential  
1:4 Clock/Data Driver with  
RSECL* Outputs  
*Reduced Swing ECL  
http://onsemi.com  
MARKING  
The NBSG14 is a 1−to−4 clock/data distribution chip, optimized for  
ultra−low skew and jitter.  
Inputs incorporate internal 50 W termination resistors and accept  
NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS,  
CML, or LVDS. Outputs are RSECL (Reduced Swing ECL),  
400 mV.  
DIAGRAM*  
SG  
14  
LYW  
FCBGA−16  
BA SUFFIX  
CASE 489  
Maximum Input Clock Frequency up to 12 GHz Typical  
Maximum Input Data Rate up to 12 Gb/s Typical  
30 ps Typical Rise and Fall Times  
125 ps Typical Propagation Delay  
SG14  
ALYW  
RSPECL Output with Operating Range: V = 2.375 V to 3.465 V  
CC  
QFN−16  
MN SUFFIX  
CASE 485G  
with V = 0 V  
EE  
RSNECL Output with RSNECL or NECL Inputs with  
Operating Range: V = 0 V with V = −2.375 V to −3.465 V  
CC  
EE  
RSECL Output Level (400 mV Peak−to−Peak Output),  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
Differential Output  
50 W Internal Input Termination Resistors  
W = Work Week  
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices  
*For further details, refer to Application Note  
AND8002/D  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NBSG14BA  
4x4 mm  
100 Units/Tray  
FCBGA−16  
NBSG14BAR2  
NBSG14MN  
4x4 mm  
FCBGA−16  
500 / Tape & Reel  
123 Units / Rail  
3x3 mm  
QFN−16  
NBSG14MNR2  
3x3 mm  
QFN−16  
3000 / Tape & Reel  
Board  
Description  
NBSG14BAEVB  
NBSG14BA Evaluation Board  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
August, 2003 − Rev. 7  
NBSG14/D  

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