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NAND512R3A0AZA1T PDF预览

NAND512R3A0AZA1T

更新时间: 2024-11-21 04:38:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存存储内存集成电路
页数 文件大小 规格书
57页 916K
描述
128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories

NAND512R3A0AZA1T 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:9 X 11 MM, 1 MM HEIGHT, 0.80 MM PITCH, VFBGA-63
针数:63Reach Compliance Code:not_compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.11Is Samacsys:N
最长访问时间:35 ns命令用户界面:YES
数据轮询:NOJESD-30 代码:R-PBGA-B63
JESD-609代码:e0长度:11 mm
内存密度:536870912 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:4K端子数量:63
字数:67108864 words字数代码:64000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64MX8
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA63,10X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH页面大小:512 words
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8 V编程电压:1.8 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:1.05 mm部门规模:16K
最大待机电流:0.00005 A子类别:Flash Memories
最大压摆率:0.015 mA最大供电电压 (Vsup):1.95 V
最小供电电压 (Vsup):1.7 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
切换位:NO类型:NAND TYPE
宽度:9 mmBase Number Matches:1

NAND512R3A0AZA1T 数据手册

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NAND128-A, NAND256-A  
NAND512-A, NAND01G-A  
128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16)  
528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories  
FEATURES SUMMARY  
HIGH DENSITY NAND FLASH MEMORIES  
Figure 1. Packages  
Up to 1 Gbit memory array  
Up to 32 Mbit spare area  
Cost effective solutions for mass storage  
applications  
NAND INTERFACE  
TSOP48 12 x 20mm  
x8 or x16 bus width  
Multiplexed Address/ Data  
Pinout compatibility for all densities  
SUPPLY VOLTAGE  
1.8V device: VDD = 1.7 to 1.95V  
3.0V device: VDD = 2.7 to 3.6V  
USOP48 12 x 17 x 0.65mm  
PAGE SIZE  
x8 device: (512 + 16 spare) Bytes  
x16 device: (256 + 8 spare) Words  
FBGA  
BLOCK SIZE  
x8 device: (16K + 512 spare) Bytes  
x16 device: (8K + 256 spare) Words  
VFBGA55 8 x 10 x 1mm  
TFBGA55 8 x 10 x 1.2mm  
VFBGA63 9 x 11 x 1mm  
TFBGA63 9 x 11 x 1.2mm  
PAGE READ / PROGRAM  
Random access: 12µs (max)  
Sequential access: 50ns (min)  
Page program time: 200µs (typ)  
DATA INTEGRITY  
COPY BACK PROGRAM MODE  
Fast page copy without external buffering  
FAST BLOCK ERASE  
Block erase time: 2ms (Typ)  
100,000 Program/Erase cycles  
10 years Data Retention  
RoHS COMPLIANCE  
Lead-Free Components are Compliant  
with the RoHS Directive  
STATUS REGISTER  
ELECTRONIC SIGNATURE  
CHIP ENABLE ‘DON’T CARE’ OPTION  
DEVELOPMENT TOOLS  
Error Correction Code software and  
hardware models  
Simple interface with microcontroller  
Bad Blocks Management and Wear  
Leveling algorithms  
SERIAL NUMBER OPTION  
HARDWARE DATA PROTECTION  
File System OS Native reference software  
Hardware simulation models  
Program/Erase locked during Power  
transitions  
February 2005  
1/57  

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