Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F674
FEATURES
PIN CONFIGURATION
• 16-bit serial I/O shift register
• 16-bit parallel-in/serial-out converter
• Recirculating serial shifting
CS
CP
V
1
2
3
4
5
24
CC
23 D15
22
R/W
NC
D14
• Common serial data I/O pin (3-State)
21 D13
DESCRIPTION
M
20
D12
The 74F674 is a 16-bit shift register with serial and parallel load
capability and serial output. A single pin serves alternately as an
input for serial entry or as a 3-State serial output. In the serial out
mode the data recirculates in the register. Chip Select, Read/Write
and Mode inputs provide control flexibility. The 74F674 operates in
one of four modes, as indicated in the Function table.
SI/O
6
7
8
9
19 D11
18
17
16
15
14
13
D0
D1
D10
D9
D8
D7
D6
D5
D2
D3 10
D4
Hold: A High signal on the Chip Select (CS) input prevents clocking
and forces the Serial Input/Output (SI/O) 3-State buffer into the high
impedance state.
11
GND 12
Serial load: Data present on the SI/O pin shifts into the register on
the falling edge of CP. Data enters the Q0 position and shifts toward
Q15 on successive clocks.
SF01188
Serial output: The SI/O 3-State buffer is active and the register
contents are shifted out from Q15 and simultaneously shifted back
into Q0.
TYPICAL SUPPLY
CURRENT
TYPE
TYPICAL f
MAX
(TOTAL)
Parallel load: Data present on D0–D15 is entered into the register
on the falling edge of CP. The SI/O 3-State buffer is active and
represents the Q15 output. To prevent false clocking, CP must be
Low during a Low-to-High transition of CS.
74F674
95MHz
55mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
V
CC
amb
24-Pin Plastic Slim DIP
(300mil)
N74F674N
24-Pin Plastic SOL
N74F674D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
74F(U.L.)
HIGH/LOW
LOAD VALUE
PINS
D0–D15
DESCRIPTION
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
70mA/0.6mA
3.0mA/24mA
Parallel data inputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
3.5/1.0
150/40
CS
CP
M
Chip Select input (active Low)
Clock Pulse input (active falling edge)
Mode select input
R/W
Read/Write input
Serial data input or
SI/O
Serial 3-state output
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
1
1989 Feb 05
853–1248 92263