Datasheet > N64T1618CBBZ-87I-TR

N64T1618CBBZ-87I-TR

更新时间： 2024-02-16 21:20:51

品牌	Logo	应用领域
NANOAMP		动态存储器
页数	文件大小	规格书
50页	959K
描述
DRAM

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中文翻译

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技术参数
数据手册

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N64T1618CBBZ-87I-TR 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

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NanoAmp Solutions, Inc.

N64T1618CBB

1982 Zanker Road, San Jose, CA 95112

ph: 408-573-8878, FAX: 408-573-8877

www.nanoamp.com

Advance Information

64Mb Ultra-Low Power Async, Page and Burst CMOS PSRAM

4M × 16 Bits

Overview

Features

The N64T1618CBB is an integrated memory

device containing a 64 Mbit Pseudo Static Random

Access Memory using a self-refresh DRAM array

organized as 4,194,304 words by 16 bits. It is

designed to be compatible in operation and inter-

face to standard 6T SRAMS. The device is

designed for low standby and operating current

and includes a power-down feature to automati-

cally enter standby mode. The device includes a

deep power-down mode as well as several other

power saving modes: Partial Array Self Refresh

mode where data is retained in a portion of the

array and Temperature Compensated Refresh.

Both these modes reduce standby current drain.

The device can be operated in a standard asyn-

chronous mode, a 16-word page mode and a high-

performance burst mode. The device has separate

power rails, VccQ and VssQ for the I/O to be run

from a separate power supply from the device

core.

• Single Device Supports Asynchronous, Page

and Burst Operations

• Dual voltage rails for optimal performance

VCC

1.70V–1.95V

VCCQ 1.70V–2.25V

VCCQ 2.3V–2.7V

VCCQ 2.7V–3.3V

• Burst Mode Continuous Write Burst

• Burst Mode Read: 4, 8, 16 or Continuous

MAX clock rate: 150 MHz (tCLK = 6.67ns)

Initial latency: 31.5ns (4 clocks) @ 150 MHz

tACLK: 5ns @ 150 MHz

• Configurable Page Size: 16, 32, 64 or 128

word per page.

Interpage read access: 70/85ns

Intrapage read access: 25ns

• Low Power Consumption

Asynchronous Read < 25mA

Intrapage Read < 15mA

Burst Read < 35mA @ 104MHz

Continuous Burst Read < 15mA @ 104MHz

Standby: 120µA

Ball Configuration

A₀

A₁

A₂

CRE

Ultra Low Power Option: 100µA

Deep power-down < 10µA

I/O₈

A₃

A₄

A₆

A₇

I/O₀

I/O₉I/O₁₀A₅

V_SSQI/O₁₁A₁₇

V_CCQI/O₁₂A₂₁

I/O₁₄I/O₁₃A₁₄

I/O₁I/O₂

I/O₃V_CC

• Low Power Features

Partial Array Self Refresh (PASR)

Temperature Compensated Refresh (TCR)

Deep Power-Down mode (DPD)

A₁₆I/O₄V_SS

A₁₅I/O₅I/O₆

• High frequency operation up to 150MHz

• Temperature Range of -25°C to +85°C

I/O₁₅A₁₉

A₁₈A₈

A₁₂

A₉

A₁₃

A₁₀

I/O₇

A₂₀

A₁₁

WAIT CLK ADV NC

54 Ball BGA (top view)

6 x 8 mm

Standby

Package

Type

Operating

Power

Operating

Current (I_SB),

Max

Part Number

I/O Supply

Speed

Temperature

Supply

Current (Icc), Max

1.70V - 1.95

2.3V - 2.7V

2.7V - 3.3V

-25^oC to +85^oC

N64T1618CBBZ

BGA

1.70V - 1.95

70/85ns

120µA

3 mA @ 1MHz

Stock No. 23310-H 1/05

This is an ADVANCE DATASHEET and subject to change without notice.

12 3 4 5 6 7...50

中文翻译

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