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N25Q032A13ESE40E PDF预览

N25Q032A13ESE40E

更新时间: 2024-11-06 14:59:03
品牌 Logo 应用领域
镁光 - MICRON /
页数 文件大小 规格书
153页 5493K
描述
32Mb, 3V, Multiple I/O, 4KB Subsector Erase, XiP Enabled, Serial NOR Flash Memory with 108 MHz Serial Peripheral Interface

N25Q032A13ESE40E 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP,Reach Compliance Code:compliant
风险等级:5.79最大时钟频率 (fCLK):108 MHz
JESD-30 代码:S-PDSO-G8长度:5.285 mm
内存密度:33554432 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:8字数:4194304 words
字数代码:4000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4MX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:SQUARE
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):260编程电压:3 V
座面最大高度:2.16 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.285 mm
Base Number Matches:1

N25Q032A13ESE40E 数据手册

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N25Q032  
32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase,  
XiP enabled, serial flash memory with 108 MHz SPI bus interface  
„ Electronic signature  
Features  
– JEDEC standard two-byte signature  
„ SPI-compatible serial bus interface  
(BA16h)  
„ 108 MHz (maximum) clock frequency  
„ 2.7 V to 3.6 V single supply voltage  
– Additional 2 Extended Device ID (EDID)  
bytes to identify device factory options  
– Unique ID code (UID) with 14 bytes read-  
only, factory programmed  
„ Supports legacy SPI protocol and new Quad  
I/O or Dual I/O SPI protocol  
„ More than 100,000 program/erase cycles per  
„ Quad/Dual I/O instructions resulting in an  
sector  
equivalent clock frequency up to 432 MHz:  
„ More than 20 years data retention  
„ XIP mode for all three protocols  
„ Packages (All packages RoHS compliant):  
– F4 = UFDFPN8 4 x 3 mm (MLP8)  
– F6 = VDFPN8 6 x 5 mm (MLP8)  
– F8 = VDFPN8 8 x 6 mm (MLP8)  
– SC = SO8N (150 mils body width)  
– SE = SO8W (208 mils body width)  
– SF = SO16 (300 mils body width)  
– 12 = TBGA24 6 x 8 mm  
– Configurable via volatile or non-volatile  
registers (enabling the memory to work in  
XiP mode directly after power on)  
„ Program/Erase suspend instructions  
„ Continuous read of entire memory via single  
instruction:  
– Fast Read  
– Quad or Dual Output Fast Read  
– Quad or Dual I/O Fast Read  
„ Flexible to fit application:  
– Configurable number of dummy cycles  
– Output buffer configurable  
– Reset function available upon customer  
request  
„ 64-byteuser-lockable, one-time programmable  
(OTP) area  
„ Erase capability  
– Subsector (4-Kbyte) granularity on the  
entire memory array.  
– Sector (64-Kbyte) granularity  
„ Write protections  
– Software write protection applicable to  
every 64-Kbyte sector (volatile lock bit)  
– Hardware write protection: protected area  
size defined by five non-volatile bits (BP0,  
BP1, BP2, and TB bit)  
– Additional smart protections available upon  
customer request  
July 2011  
Rev 2  
1/153  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2010 Micron Technology, Inc. All rights reserved.  

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