NanoAmp Solutions, Inc.
N16D1633LPA
670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035
ph: 408-935-7777, FAX: 408-935-7770
www.nanoamp.com
Advance Information
512K × 16 Bits × 2 Banks Low Power Synchronous DRAM
DESCRIPTION
These N16D1633LPA are low power 16,777,216 bits CMOS Synchronous DRAM organized as 2 banks of 524,288
words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the
clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally
pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Features
• JEDEC standard 3.0V/3.3V power supply.
• Auto refresh and self refresh.
• All pins are compatible with LVTTL interface.
• 4K refresh cycle / 64ms.
• Programmable Burst Length and Burst Type.
- 1, 2, 4, 8 or Full Page for Sequential Burst.
- 4 or 8 for Interleave Burst.
• All inputs and outputs referenced to the positive
edge of the system clock.
• Data mask function by DQM.
• Internal dual banks operation.
• Burst Read Single Write operation.
• Special Function Support.
-PASR (Partial Array Self Refresh)
-Auto TCSR(Temperature Compensated Self Refresh)
• Programmable CAS Latency : 2,3 clocks.
• Automatic precharge, includes CONCURRENT
• Programmable Driver Strength Control.
Auto Precharge Mode and controlled Precharge
- Full Strength or 1/2, 1/4 of Full Strength
• Deep Power Down Mode
Table 1: Ordering Information
PART NO.
CLOCK Freq.
Temperature
VDD/VDDQ
INTERLEAVE
PACKAGE
N16D1633LPAZ2-75I
N16D1633LPAZ2-10I
N16D1633LPAC2-60I
N16D1633LPAC2-75I
N16D1633LPAC2-10I
N16D1633LPAT2-60I
N16D1633LPAT2-75I
N16D1633LPAT2-10I
133MHz
100MHz
166MHz
133MHz
100MHz
166MHz
133MHz
100MHz
48-Ball Green
FBGA
-25o C to
85o C
60-Ball Green
WBGA
3.0V/3.0V
or
3.3V/3.3V
LVTTL
50-Pin Green
TSOP II
Stock No. 23395- Rev L 1/06
1
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.