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MX609J PDF预览

MX609J

更新时间: 2024-11-03 22:29:43
品牌 Logo 应用领域
CMLMICRO 解码器编解码器过程控制系统个人通信PCSPCN
页数 文件大小 规格书
14页 201K
描述
PCN/PCS DELTA MODULATION CODEC

MX609J 技术参数

生命周期:Not Recommended零件包装代码:DIP
包装说明:DIP, DIP22,.4针数:22
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.35压伸定律:CVSD
滤波器:YESJESD-30 代码:R-GDIP-T22
长度:27.175 mm功能数量:1
端子数量:22工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:-30 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP22,.4封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified座面最大高度:5.84 mm
子类别:Other Telecom ICs标称供电电压:5 V
表面贴装:NO技术:CMOS
电信集成电路类型:CVSD CODEC温度等级:OTHER
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:10.16 mm
Base Number Matches:1

MX609J 数据手册

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DATA BULLETIN  
PCN/PCS DELTA  
MODULATION CODEC  
MX609  
Features  
Applications  
Single Chip full Duplex CVSD CODEC  
On-chip Input and Output Filters  
Programmable Sampling Clocks  
3- or 4-bit Companding Algorithm  
Powersave Capabilities  
Digital PCN/PCS Systems  
Digital Cordless Phones  
Digital Delay Lines  
Digital Voice Storage  
Multiplexers, Switches, and  
Phones  
Low Power, 5.0V Operation  
Time Domain Scramblers  
DATA ENABLE  
ENCODER FORCE IDLE*  
ENCODER INPUT  
ENCODER  
MOD  
OUTPUT  
V
V
DD  
SS  
f1  
f2  
XTAL/CLOCK  
f0  
XTAL  
CLOCK RATE  
GENERATORS  
ENCODER DATA CLOCK  
DECODER DATA CLOCK  
V
BIAS  
MODE 1  
MODE 2  
CLOCK MODE  
LOGIC  
SAMPLING RATE  
CONTROL  
3 or 4 BIT  
ALGORITHM  
f3  
f1  
POWERSAVE  
DECODER INPUT  
DECODER  
OUTPUT  
DEMOD  
DECODER FORCE IDLE*  
*Available on J,P & LH  
package styles only  
The MX609 is a Continuously Variable Slope Delta Modulation (CVSD) Codec designed for use in cordless  
telephones. The device is suitable for applications in delta multiplexers, switches and phones. Encoder input  
and decoder output switched capacitor filters are incorporated on-chip.  
Sampling clock rates can be programmed to 16, 32 or 64K bits/second from an internal clock generator or  
externally injected in the 8 to 64K bits/second range. The internal clocks are derived from an on-chip  
reference oscillator driven by an externally connected crystal. The sampling clock frequency is output for the  
synchronization of external circuits.  
The encoder has an enable function for use in multiplexer applications. When not enabled the encoder output  
remains in a high-impedance “tri-state” mode.  
Companding circuits may be operated with an externally selectable 3- or 4-bit algorithm. The device may be  
put in standby mode when Powersave is selected.  
The MX609 operates with a supply voltage of 5.0V and is available in the following packages: 24-pin PLCC  
(MX609LH), 16-pin SOIC (MX609DW), 22-pin CERDIP (MX609J), and 22-pin PDIP (MX609P).  
1998 MX-COM, Inc.  
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054  
Doc. # 20480069.005  
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA  
All Trademarks and service marks are held by their respective companies.  

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