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MX29LV161BMC-70 PDF预览

MX29LV161BMC-70

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
旺宏电子 - Macronix 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
58页 993K
描述
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

MX29LV161BMC-70 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP44,.63针数:44
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.35
Is Samacsys:N最长访问时间:70 ns
备用内存宽度:8启动块:BOTTOM
命令用户界面:YES数据轮询:YES
JESD-30 代码:R-PDSO-G44JESD-609代码:e0
长度:28.5 mm内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:1,2,1,31
端子数量:44字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP44,.63
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:3/3.3 V
编程电压:3 V认证状态:Not Qualified
座面最大高度:3 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.03 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:12.6 mm
Base Number Matches:1

MX29LV161BMC-70 数据手册

 浏览型号MX29LV161BMC-70的Datasheet PDF文件第2页浏览型号MX29LV161BMC-70的Datasheet PDF文件第3页浏览型号MX29LV161BMC-70的Datasheet PDF文件第4页浏览型号MX29LV161BMC-70的Datasheet PDF文件第5页浏览型号MX29LV161BMC-70的Datasheet PDF文件第6页浏览型号MX29LV161BMC-70的Datasheet PDF文件第7页 
MX29LV161T/B  
16M-BIT[2Mx8/1Mx16]CMOSSINGLEVOLTAGE  
3VONLYFLASHMEMORY  
FEATURES  
• Extended single - supply voltage range 2.7V to 3.6V  
• 2,097,152 x 8/1,048,576 x 16 switchable  
• Singlepowersupplyoperation  
-Datapolling&Togglebitfordetectionofprogramand  
eraseoperationcompletion.  
• Ready/Busy pin (RY/BY)  
- 3.0V only operation for read, erase and program  
operation  
-Providesahardwaremethodofdetectingprogramor  
eraseoperationcompletion.  
• Fast access time: 70/90ns  
• Sectorprotection  
• Lowpowerconsumption  
- Hardware method to disable any combination of  
sectors from program or erase operations  
- Tempoary sector unprotect allows code changes in  
previously locked sectors.  
- 20mA maximum active current  
- 0.2uA typical standby current  
• Commandregisterarchitecture  
- Byte/word Programming (9us/11us typical)  
- Sector Erase (Sector structure 16K-Bytex1,  
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase Suspend capability.  
• 100,000minimumerase/programcycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Sector Architecture  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
• Low VCC write inhibit is equal to or less than 2.3V  
• Package type:  
- Automatically program and verify data at specified  
address  
- 44-pin SOP  
• Erasesuspend/EraseResume  
- 48-pin TSOP  
- Suspends sector erase operation to read data from,  
orprogramdatato,any sectorthatisnotbeingerased,  
then resumes the erase.  
- 48 Ball CSP  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
• Status Reply  
GENERAL DESCRIPTION  
The MX29LV161T/B is a 16-mega bit Flash memory or-  
ganized as 2M bytes of 8 bits or 1M words of 16 bits.  
MXIC's Flash memories offer the most cost-effective  
and reliable read/write non-volatile random access  
memory. The MX29LV161T/B is packaged in 44-pin  
SOP, 48-pin TSOP, and 48CSP. It is designed to be  
reprogrammed and erased in system or in standard  
EPROM programmers.  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining maxi-  
mum EPROM compatibility.  
MXIC Flash technology reliably stores memory contents  
even after 100,000 erase and program cycles. The MXIC  
cell is designed to optimize the erase and programming  
mechanisms. In addition, the combination of advanced  
tunnel oxide processing and low internal electric fields  
for erase and program operations produces reliable cy-  
cling. The MX29LV161T/B uses a 2.7V~3.6VVCC sup-  
ply to perform the High Reliability Erase and auto Pro-  
gram/Erase algorithms.  
The standard MX29LV161T/B offers access time as fast  
as 70ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX29LV161T/B has separate chip enable (CE) and  
output enable (OE) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29LV161T/B uses a command register to manage  
this functionality. The command register allows for 100%  
P/N:PM0855  
REV. 1.0, SEP. 24, 2001  
1

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