ADVANCED INFORMATION
MX29F805T/B
8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY
FEATURES
• 1,048,576 x 8/524,288 x 16 switchable
• Dual power supply operation
• Erase suspend/Erase Resume
- Suspends an erase operation to read data from, or
- 5.0V only operation for read, 10.0V for erase and
program operations
• Fast access time: 90/120ns
program data to, another sector that is not being
erased, then resumes the erase.
• Status Reply
• Low power consumption
- Data polling & Toggle bit for detection of program
and erase cycle completion.
- 30mA maximum active current
- 1uA typical standby current
• Sector protection
• Command register architecture
- Word Programming (14us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
-Automaticallyeraseanycombinationofsectorswith
Erase Suspend capability.
• 100 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
- Automatically program and verify data at specified
address
- 42-pin PDIP
GENERAL DESCRIPTION
The MX29F805T/B is a 8-mega bit Flash memory or-
ganized as 1M bytes of 8 bits or 512K words of 16 bits.
MXIC's Flash memories offer the most cost-effective and
reliable read/write non-volatile random access memory.
The MX29F805T/B is packaged in 42-pin PDIP. It is
designed to be reprogrammed and erased in system or
in standard EPROM programmers.
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29F805T/B needs 10V power supply to
perform the High Reliability Erase and auto Program/
Erase algorithms.
The standard MX29F805T/B offers access time as fast
as 90ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention,
the MX29F805T/B has separate chip enable (CE) and
output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with electrical erasure and programming. The
MX29F805T/B uses a command register to manage this
functionality. The command register allows for 100%
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
P/N:PM0614
REV. 0.0, MAR. 31, 1999
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