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MX29F800BMI-70 PDF预览

MX29F800BMI-70

更新时间: 2024-11-04 21:16:39
品牌 Logo 应用领域
旺宏电子 - Macronix 光电二极管内存集成电路
页数 文件大小 规格书
42页 699K
描述
Flash, 512KX16, 70ns, PDSO44

MX29F800BMI-70 数据手册

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PRELIMINARY  
MX29F800T/B  
8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY  
FEATURES  
• 1,048,576 x 8/524,288 x 16 switchable  
• Single power supply operation  
eraseoperationcompletion.  
• Ready/Busy pin (RY/BY)  
- 5.0V only operation for read, erase and program  
operation  
- Provides a hardware method of detecting program  
oreraseoperationcompletion.  
• Fast access time: 70/90/120ns  
• Sectorprotection  
• Low power consumption  
- Sector protect/chip unprotect for 5V/12V system.  
- Hardware method to disable any combination of  
sectors from program or erase operations  
-Temporarysectorunprotectallowscodechangesin  
previously locked sectors.  
- 50mA maximum active current  
- 0.2uA typical standby current  
• Command register architecture  
- Byte/word Programming (7us/12us typical)  
- Sector Erase (Sector structure 16K-Bytex1,  
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase Suspend capability.  
• 100,000minimumerase/programcycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Code Sector Architecture  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
- Automatically program and verify data at specified  
address  
• Low VCC write inhibit is equal to or less than 3.2V  
• Package type:  
• Erase suspend/Erase Resume  
- 44-pin SOP  
- Suspends sector erase operation to read data from,  
or program data to, another sector that is not being  
erased, then resumes the erase.  
- 48-pin TSOP  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
• Status Reply  
-Datapolling&Togglebitfordetectionofprogramand  
GENERAL DESCRIPTION  
The MX29F800T/B is a 8-mega bit Flash memory or-  
ganized as 1M bytes of 8 bits or 512K words of 16 bits.  
MXIC's Flash memories offer the most cost-effective and  
reliable read/write non-volatile random access memory.  
The MX29F800T/B is packaged in 44-pin SOP, 48-pin  
TSOP. It is designed to be reprogrammed and erased  
in system or in standard EPROM programmers.  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining maxi-  
mum EPROM compatibility.  
MXIC Flash technology reliably stores memory contents  
even after 100,000 erase and program cycles. The MXIC  
cell is designed to optimize the erase and programming  
mechanisms. In addition, the combination of advanced  
tunnel oxide processing and low internal electric fields  
for erase and program operations produces reliable cy-  
cling. The MX29F800T/B uses a 5.0V±10% VCC sup-  
ply to perform the High Reliability Erase and auto Pro-  
gram/Erase algorithms.  
The standard MX29F800T/B offers access time as fast  
as 70ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX29F800T/B has separate chip enable (CE) and  
output enable (OE) controls.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29F800T/B uses a command register to manage this  
functionality. The command register allows for 100%  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
P/N:PM0578  
REV. 1.9, JUN. 06, 2002  
1

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